Message ID | 20211216202614.414266-22-clg@kaod.org |
---|---|
State | New |
Headers | show
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Thu, 16 Dec 2021 20:26:34 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1BGKQWli40698344 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 16 Dec 2021 20:26:32 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 44E334C04A; Thu, 16 Dec 2021 20:26:32 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0AA564C044; Thu, 16 Dec 2021 20:26:32 +0000 (GMT) Received: from smtp.tlslab.ibm.com (unknown [9.101.4.1]) by d06av22.portsmouth.uk.ibm.com (Postfix) with SMTP; Thu, 16 Dec 2021 20:26:31 +0000 (GMT) Received: from yukon.ibmuc.com (unknown [9.171.48.122]) by smtp.tlslab.ibm.com (Postfix) with ESMTP id 5EE38220238; Thu, 16 Dec 2021 21:26:31 +0100 (CET) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org> To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Subject: [PULL 021/101] softfloat: Add flag specific to Inf - Inf Date: Thu, 16 Dec 2021 21:24:54 +0100 Message-Id: <20211216202614.414266-22-clg@kaod.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211216202614.414266-1-clg@kaod.org> References: <20211216202614.414266-1-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; 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diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 65a43aff5970..eaa12e1e0033 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -152,6 +152,7 @@ enum { float_flag_inexact = 0x0010, float_flag_input_denormal = 0x0020, float_flag_output_denormal = 0x0040, + float_flag_invalid_isi = 0x0080, /* inf - inf */ }; /* diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc index 41d4b17e4190..eb2b475ca466 100644 --- a/fpu/softfloat-parts.c.inc +++ b/fpu/softfloat-parts.c.inc @@ -354,7 +354,7 @@ static FloatPartsN *partsN(addsub)(FloatPartsN *a, FloatPartsN *b, return a; } /* Inf - Inf */ - float_raise(float_flag_invalid, s); + float_raise(float_flag_invalid | float_flag_invalid_isi, s); parts_default_nan(a, s); return a; } @@ -494,6 +494,7 @@ static FloatPartsN *partsN(muladd)(FloatPartsN *a, FloatPartsN *b, if (ab_mask & float_cmask_inf) { if (c->cls == float_class_inf && a->sign != c->sign) { + float_raise(float_flag_invalid | float_flag_invalid_isi, s); goto d_nan; } goto return_inf;