diff mbox series

[PULL,13/33] target/arm: Advance pc for arch single-step exception

Message ID 20211215104049.2030475-14-peter.maydell@linaro.org
State Accepted
Commit 485088f7425ec7f99d3f21cafb028aa92639618d
Headers show
Series [PULL,01/33] hw/intc: clean-up error reporting for failed ITS cmd | expand

Commit Message

Peter Maydell Dec. 15, 2021, 10:40 a.m. UTC 
From: Richard Henderson <richard.henderson@linaro.org>

The size of the code covered by a TranslationBlock cannot be 0;
this is checked via assert in tb_gen_code.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate-a64.c | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 9c4258ccac2..2986fe13935 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14767,6 +14767,7 @@  static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
         assert(s->base.num_insns == 1);
         gen_swstep_exception(s, 0, 0);
         s->base.is_jmp = DISAS_NORETURN;
+        s->base.pc_next = pc + 4;
         return;
     }