new file mode 100644
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/atmel,quadspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Quad Serial Peripheral Interface (QSPI)
+
+maintainers:
+ - Tudor Ambarus <tudor.ambarus@microchip.com>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - atmel,sama5d2-qspi
+ - microchip,sam9x60-qspi
+
+ reg:
+ items:
+ - description: base registers
+ - description: mapped memory
+
+ reg-names:
+ items:
+ - const: qspi_base
+ - const: qspi_mmap
+
+ clocks:
+ minItems: 1
+ items:
+ - description: peripheral clock
+ - description: system clock, if available
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: pclk
+ - const: qspick
+
+ interrupts:
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - clocks
+ - clock-names
+ - '#address-cells'
+ - '#size-cells'
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/clock/at91.h>
+ spi@f0020000 {
+ compatible = "atmel,sama5d2-qspi";
+ reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
+ reg-names = "qspi_base", "qspi_mmap";
+ interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
+ clock-names = "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0_default>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+ };
deleted file mode 100644
@@ -1,37 +0,0 @@
-* Atmel Quad Serial Peripheral Interface (QSPI)
-
-Required properties:
-- compatible: Should be one of the following:
- - "atmel,sama5d2-qspi"
- - "microchip,sam9x60-qspi"
-- reg: Should contain the locations and lengths of the base registers
- and the mapped memory.
-- reg-names: Should contain the resource reg names:
- - qspi_base: configuration register address space
- - qspi_mmap: memory mapped address space
-- interrupts: Should contain the interrupt for the device.
-- clocks: Should reference the peripheral clock and the QSPI system
- clock if available.
-- clock-names: Should contain "pclk" for the peripheral clock and "qspick"
- for the system clock when available.
-- #address-cells: Should be <1>.
-- #size-cells: Should be <0>.
-
-Example:
-
-spi@f0020000 {
- compatible = "atmel,sama5d2-qspi";
- reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
- reg-names = "qspi_base", "qspi_mmap";
- interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
- clock-names = "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spi0_default>;
-
- m25p80@0 {
- ...
- };
-};
Convert the Atmel QuadSPI controller Device Tree binding documentation to json-schema. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- .../bindings/spi/atmel,quadspi.yaml | 87 +++++++++++++++++++ .../devicetree/bindings/spi/atmel-quadspi.txt | 37 -------- 2 files changed, 87 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/atmel,quadspi.yaml delete mode 100644 Documentation/devicetree/bindings/spi/atmel-quadspi.txt