@@ -643,6 +643,13 @@ int kvm_handle_cp_64(struct kvm_vcpu *vcpu,
params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
params.CRm = 0;
+ if (global == cp14_regs)
+ trace_kvm_emulate_cp14_imp(params.Op1, params.Rt1, params.CRn,
+ params.CRm, params.Op2, params.is_write);
+ else
+ trace_kvm_emulate_cp15_imp(params.Op1, params.Rt1, params.CRn,
+ params.CRm, params.Op2, params.is_write);
+
if (!emulate_cp(vcpu, ¶ms, target_specific, nr_specific))
return 1;
if (!emulate_cp(vcpu, ¶ms, global, nr_global))
@@ -680,6 +687,13 @@ int kvm_handle_cp_32(struct kvm_vcpu *vcpu,
params.Op2 = (kvm_vcpu_get_hsr(vcpu) >> 17) & 0x7;
params.Rt2 = 0;
+ if (global == cp14_regs)
+ trace_kvm_emulate_cp14_imp(params.Op1, params.Rt1, params.CRn,
+ params.CRm, params.Op2, params.is_write);
+ else
+ trace_kvm_emulate_cp15_imp(params.Op1, params.Rt1, params.CRn,
+ params.CRm, params.Op2, params.is_write);
+
if (!emulate_cp(vcpu, ¶ms, target_specific, nr_specific))
return 1;
if (!emulate_cp(vcpu, ¶ms, global, nr_global))
@@ -159,6 +159,36 @@ TRACE_EVENT(kvm_emulate_cp15_imp,
__entry->CRm, __entry->Op2)
);
+/* Architecturally implementation defined CP14 register access */
+TRACE_EVENT(kvm_emulate_cp14_imp,
+ TP_PROTO(unsigned long Op1, unsigned long Rt1, unsigned long CRn,
+ unsigned long CRm, unsigned long Op2, bool is_write),
+ TP_ARGS(Op1, Rt1, CRn, CRm, Op2, is_write),
+
+ TP_STRUCT__entry(
+ __field( unsigned int, Op1 )
+ __field( unsigned int, Rt1 )
+ __field( unsigned int, CRn )
+ __field( unsigned int, CRm )
+ __field( unsigned int, Op2 )
+ __field( bool, is_write )
+ ),
+
+ TP_fast_assign(
+ __entry->is_write = is_write;
+ __entry->Op1 = Op1;
+ __entry->Rt1 = Rt1;
+ __entry->CRn = CRn;
+ __entry->CRm = CRm;
+ __entry->Op2 = Op2;
+ ),
+
+ TP_printk("Implementation defined CP14: %s\tp14, %u, r%u, c%u, c%u, %u",
+ (__entry->is_write) ? "mcr" : "mrc",
+ __entry->Op1, __entry->Rt1, __entry->CRn,
+ __entry->CRm, __entry->Op2)
+);
+
TRACE_EVENT(kvm_wfx,
TP_PROTO(unsigned long vcpu_pc, bool is_wfe),
TP_ARGS(vcpu_pc, is_wfe),