diff mbox series

[v3,03/22] dt-bindings: mtd: nand-controller: Harmonize the property types

Message ID 20211207093422.166934-4-miquel.raynal@bootlin.com
State New
Headers show
Series External ECC engines & Macronix support | expand

Commit Message

Miquel Raynal Dec. 7, 2021, 9:34 a.m. UTC
Harmonize the different properties in this file by:
* dropping the non-necessary allOf's
* always defining the keywords in the following order:
    - first: "type"/"$ref",
    - second: "description" (when relevant),
    - then the other generic keywords ("enum", "default", etc).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../devicetree/bindings/mtd/nand-controller.yaml | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

Comments

Rob Herring (Arm) Dec. 14, 2021, 5:45 p.m. UTC | #1
On Tue, Dec 07, 2021 at 10:34:03AM +0100, Miquel Raynal wrote:
> Harmonize the different properties in this file by:
> * dropping the non-necessary allOf's
> * always defining the keywords in the following order:
>     - first: "type"/"$ref",
>     - second: "description" (when relevant),

If we're going to muck with this, really I prefer description first or 
last and everything else together.

>     - then the other generic keywords ("enum", "default", etc).
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  .../devicetree/bindings/mtd/nand-controller.yaml | 16 +++++++---------
>  1 file changed, 7 insertions(+), 9 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index 5cd144a9ec99..7024ca24c2e2 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -58,8 +58,7 @@ patternProperties:
>            Contains the chip-select IDs.
>  
>        nand-ecc-engine:
> -        allOf:
> -          - $ref: /schemas/types.yaml#/definitions/phandle
> +        $ref: /schemas/types.yaml#/definitions/phandle
>          description: |
>            A phandle on the hardware ECC engine if any. There are
>            basically three possibilities:
> @@ -79,25 +78,24 @@ patternProperties:
>          description: Do not use any ECC correction.
>  
>        nand-ecc-placement:
> -        allOf:
> -          - $ref: /schemas/types.yaml#/definitions/string
> -          - enum: [ oob, interleaved ]
> +        $ref: /schemas/types.yaml#/definitions/string
>          description:
>            Location of the ECC bytes. This location is unknown by default
>            but can be explicitly set to "oob", if all ECC bytes are
>            known to be stored in the OOB area, or "interleaved" if ECC
>            bytes will be interleaved with regular data in the main area.
> +        enum: [ oob, interleaved ]
>  
>        nand-ecc-algo:
> +        $ref: /schemas/types.yaml#/definitions/string
>          description:
>            Desired ECC algorithm.
> -        $ref: /schemas/types.yaml#/definitions/string
>          enum: [hamming, bch, rs]
>  
>        nand-bus-width:
> +        $ref: /schemas/types.yaml#/definitions/uint32
>          description:
>            Bus width to the NAND chip
> -        $ref: /schemas/types.yaml#/definitions/uint32
>          enum: [8, 16]
>          default: 8
>  
> @@ -113,15 +111,15 @@ patternProperties:
>            build a volatile BBT in RAM.
>  
>        nand-ecc-strength:
> +        $ref: /schemas/types.yaml#/definitions/uint32
>          description:
>            Maximum number of bits that can be corrected per ECC step.
> -        $ref: /schemas/types.yaml#/definitions/uint32
>          minimum: 1
>  
>        nand-ecc-step-size:
> +        $ref: /schemas/types.yaml#/definitions/uint32
>          description:
>            Number of data bytes covered by a single ECC step.
> -        $ref: /schemas/types.yaml#/definitions/uint32
>          minimum: 1
>  
>        nand-ecc-maximize:
> -- 
> 2.27.0
> 
>
Miquel Raynal Dec. 15, 2021, 3:50 p.m. UTC | #2
Hi Rob,

robh@kernel.org wrote on Tue, 14 Dec 2021 11:45:25 -0600:

> On Tue, Dec 07, 2021 at 10:34:03AM +0100, Miquel Raynal wrote:
> > Harmonize the different properties in this file by:
> > * dropping the non-necessary allOf's
> > * always defining the keywords in the following order:
> >     - first: "type"/"$ref",
> >     - second: "description" (when relevant),  
> 
> If we're going to muck with this, really I prefer description first or 
> last and everything else together.

Ok, no problem.

This is just a patch cleaning things up before moving the properties
around anyway.

Can I add your Reviewed-by when sending the updated version? I would
like to merge the first halve of this series soon enough.

> 
> >     - then the other generic keywords ("enum", "default", etc).
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

Thanks,
Miquèl
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
index 5cd144a9ec99..7024ca24c2e2 100644
--- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
+++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
@@ -58,8 +58,7 @@  patternProperties:
           Contains the chip-select IDs.
 
       nand-ecc-engine:
-        allOf:
-          - $ref: /schemas/types.yaml#/definitions/phandle
+        $ref: /schemas/types.yaml#/definitions/phandle
         description: |
           A phandle on the hardware ECC engine if any. There are
           basically three possibilities:
@@ -79,25 +78,24 @@  patternProperties:
         description: Do not use any ECC correction.
 
       nand-ecc-placement:
-        allOf:
-          - $ref: /schemas/types.yaml#/definitions/string
-          - enum: [ oob, interleaved ]
+        $ref: /schemas/types.yaml#/definitions/string
         description:
           Location of the ECC bytes. This location is unknown by default
           but can be explicitly set to "oob", if all ECC bytes are
           known to be stored in the OOB area, or "interleaved" if ECC
           bytes will be interleaved with regular data in the main area.
+        enum: [ oob, interleaved ]
 
       nand-ecc-algo:
+        $ref: /schemas/types.yaml#/definitions/string
         description:
           Desired ECC algorithm.
-        $ref: /schemas/types.yaml#/definitions/string
         enum: [hamming, bch, rs]
 
       nand-bus-width:
+        $ref: /schemas/types.yaml#/definitions/uint32
         description:
           Bus width to the NAND chip
-        $ref: /schemas/types.yaml#/definitions/uint32
         enum: [8, 16]
         default: 8
 
@@ -113,15 +111,15 @@  patternProperties:
           build a volatile BBT in RAM.
 
       nand-ecc-strength:
+        $ref: /schemas/types.yaml#/definitions/uint32
         description:
           Maximum number of bits that can be corrected per ECC step.
-        $ref: /schemas/types.yaml#/definitions/uint32
         minimum: 1
 
       nand-ecc-step-size:
+        $ref: /schemas/types.yaml#/definitions/uint32
         description:
           Number of data bytes covered by a single ECC step.
-        $ref: /schemas/types.yaml#/definitions/uint32
         minimum: 1
 
       nand-ecc-maximize: