| Message ID | b9364dc5dd31cea84a58c156cfce5b90b9248d7d.1638900542.git.robin.murphy@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/5] dt-bindings: arm: Catch up with Cortex/Neoverse CPUs again | expand |
diff --git a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml index b78b6b0fce66..b623520ad302 100644 --- a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml +++ b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml @@ -21,7 +21,11 @@ description: properties: compatible: - const: "arm,dsu-pmu" + oneof: + const: "arm,dsu-pmu" + items: + const: "arm,dsu-110-pmu" + const: "arm,dsu-pmu" interrupts: items: @@ -30,7 +34,7 @@ properties: cpus: $ref: /schemas/types.yaml#/definitions/phandle-array minitems: 1 - maxitems: 8 + maxitems: 12 description: List of phandles for the CPUs connected to this DSU instance. required:
DSU-110 is the newest and shiniest for Armv9. Its programmer's model is largely identical to the previous generation of DSUs, so we can treat it as compatible, but it does have a a handful of extra IMP-DEF PMU events to call its own. Thanks to the new notion of core complexes, the maximum number of supported CPUs goes up as well. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)