| Message ID | d035e37829c6f9ec8f01d1137020af635e34966f.1638430506.git.quic_schowdhu@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add Embedded USB Debugger (EUD) driver | expand |
On Thu, Dec 02, 2021 at 03:21:25PM +0530, Souradeep Chowdhury wrote: > Add the Embedded USB Debugger(EUD) device tree node. The > node contains EUD base register region and EUD mode > manager register regions along with the interrupt entry. > Also add the connector to EUD which is mapped as the child > of dwc3. The connector is attached to EUD via port. Also add > the role-switch property to dwc3 node. > > Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 53a21d0..2d14e5c 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -1315,6 +1315,18 @@ > phys = <&usb_2_hsphy>; > phy-names = "usb2-phy"; > maximum-speed = "high-speed"; > + usb-role-switch; > + usb_con: eud_usb_connector { > + compatible = "qcom,usb-connector-eud", > + "usb-c-connector"; > + ports { > + port@0 { It is already defined that port@0 of the connector is USB HS data. Is that the case here? What about the SS lines?
On 12/14/2021 1:29 AM, Rob Herring wrote: > On Thu, Dec 02, 2021 at 03:21:25PM +0530, Souradeep Chowdhury wrote: >> Add the Embedded USB Debugger(EUD) device tree node. The >> node contains EUD base register region and EUD mode >> manager register regions along with the interrupt entry. >> Also add the connector to EUD which is mapped as the child >> of dwc3. The connector is attached to EUD via port. Also add >> the role-switch property to dwc3 node. >> >> Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 25 +++++++++++++++++++++++++ >> 1 file changed, 25 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> index 53a21d0..2d14e5c 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> @@ -1315,6 +1315,18 @@ >> phys = <&usb_2_hsphy>; >> phy-names = "usb2-phy"; >> maximum-speed = "high-speed"; >> + usb-role-switch; >> + usb_con: eud_usb_connector { >> + compatible = "qcom,usb-connector-eud", >> + "usb-c-connector"; >> + ports { >> + port@0 { > It is already defined that port@0 of the connector is USB HS data. Is > that the case here? What about the SS lines? As per the yaml documentation this is to be used for USB HS lines but in this case I am using the port to get the connector fwnode from the eud driver and then perform the role switch from the connector parent which is the dwc3 controller. Should I update the yaml file to include this description? > From the description, it sounds like the data path is DWC3 -> EUD -> > connector. The DT structure doesn't match that. EUD is an independent QCOM IP , it is a mini usb hub which can only function in device mode. That's why it has been mapped as a separate device tree node connected to the type c connector via port endpoint to perform a role switch when necessary. I have kept EUD and connector at the same level as there is no direct data path from EUD to the connector and both are at a level below the controller. > >> + usb2_role_switch: endpoint { >> + remote-endpoint = <&eud_ep>; >> + }; >> + }; >> + }; >> + }; >> }; >> }; >> >> @@ -1339,6 +1351,19 @@ >> interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; >> }; >> >> + eud: eud@88e0000 { >> + compatible = "qcom,sc7280-eud","qcom,eud"; >> + reg = <0 0x88e0000 0 0x2000>, >> + <0 0x88e2000 0 0x1000>; >> + interrupt-parent = <&pdc>; >> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; >> + port { >> + eud_ep: endpoint { >> + remote-endpoint = <&usb2_role_switch>; >> + }; >> + }; >> + }; >> + >> nsp_noc: interconnect@a0c0000 { >> reg = <0 0x0a0c0000 0 0x10000>; >> compatible = "qcom,sc7280-nsp-noc"; >> -- >> 2.7.4 >> >>
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 53a21d0..2d14e5c 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1315,6 +1315,18 @@ phys = <&usb_2_hsphy>; phy-names = "usb2-phy"; maximum-speed = "high-speed"; + usb-role-switch; + usb_con: eud_usb_connector { + compatible = "qcom,usb-connector-eud", + "usb-c-connector"; + ports { + port@0 { + usb2_role_switch: endpoint { + remote-endpoint = <&eud_ep>; + }; + }; + }; + }; }; }; @@ -1339,6 +1351,19 @@ interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; }; + eud: eud@88e0000 { + compatible = "qcom,sc7280-eud","qcom,eud"; + reg = <0 0x88e0000 0 0x2000>, + <0 0x88e2000 0 0x1000>; + interrupt-parent = <&pdc>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + port { + eud_ep: endpoint { + remote-endpoint = <&usb2_role_switch>; + }; + }; + }; + nsp_noc: interconnect@a0c0000 { reg = <0 0x0a0c0000 0 0x10000>; compatible = "qcom,sc7280-nsp-noc";
Add the Embedded USB Debugger(EUD) device tree node. The node contains EUD base register region and EUD mode manager register regions along with the interrupt entry. Also add the connector to EUD which is mapped as the child of dwc3. The connector is attached to EUD via port. Also add the role-switch property to dwc3 node. Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)