@@ -35,6 +35,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.pc;
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.pc = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
struct _aarch64_ctx *hdr;
@@ -16,6 +16,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.sc_pc;
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.sc_pc = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
uint32_t *pc = (uint32_t *)host_signal_pc(uc);
@@ -16,6 +16,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.arm_pc;
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.arm_pc = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
/*
@@ -16,6 +16,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.gregs[REG_EIP];
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.gregs[REG_EIP] = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
return uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe
@@ -16,6 +16,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.pc;
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.pc = pc;
+}
+
#if defined(__misp16) || defined(__mips_micromips)
#error "Unsupported encoding"
#endif
@@ -16,6 +16,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.regs->nip;
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.regs->nip = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
return uc->uc_mcontext.regs->trap != 0x400
@@ -16,6 +16,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.__gregs[REG_PC];
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.__gregs[REG_PC] = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
/*
@@ -16,6 +16,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.psw.addr;
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.psw.addr = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
uint16_t *pinsn = (uint16_t *)host_signal_pc(uc);
@@ -20,6 +20,15 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
#endif
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+#ifdef __arch64__
+ uc->uc_mcontext.mc_gregs[MC_PC] = pc;
+#else
+ uc->uc_mcontext.gregs[REG_PC] = pc;
+#endif
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
uint32_t insn = *(uint32_t *)host_signal_pc(uc);
@@ -15,6 +15,11 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc)
return uc->uc_mcontext.gregs[REG_RIP];
}
+static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
+{
+ uc->uc_mcontext.gregs[REG_RIP] = pc;
+}
+
static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
{
return uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe