diff mbox series

arm64: dts: freescale: Fix 'interrupt-map' parent address cells

Message ID 20210928192154.1841889-1-robh@kernel.org
State New
Headers show
Series arm64: dts: freescale: Fix 'interrupt-map' parent address cells | expand

Commit Message

Rob Herring (Arm) Sept. 28, 2021, 7:21 p.m. UTC
The 'interrupt-map' in several Layerscape SoCs is malformed. The
'#address-cells' size of the parent interrupt controller (the GIC) is not
accounted for.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>

---
 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 24 +++++++++----------
 .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 24 +++++++++----------
 .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 24 +++++++++----------
 3 files changed, 36 insertions(+), 36 deletions(-)

-- 
2.30.2

Comments

Leo Li Sept. 29, 2021, 9:53 p.m. UTC | #1
On Tue, Sep 28, 2021 at 2:22 PM Rob Herring <robh@kernel.org> wrote:
>

> The 'interrupt-map' in several Layerscape SoCs is malformed. The

> '#address-cells' size of the parent interrupt controller (the GIC) is not

> accounted for.

>

> Cc: Shawn Guo <shawnguo@kernel.org>

> Cc: Li Yang <leoyang.li@nxp.com>

> Cc: linux-arm-kernel@lists.infradead.org

> Signed-off-by: Rob Herring <robh@kernel.org>


Acked-by: Li Yang <leoyang.li@nxp.com>


> ---

>  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 24 +++++++++----------

>  .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 24 +++++++++----------

>  .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 24 +++++++++----------

>  3 files changed, 36 insertions(+), 36 deletions(-)

>

> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

> index f85e437f80b7..84a31372b3fa 100644

> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

> @@ -241,18 +241,18 @@ extirq: interrupt-controller@14 {

>                                 interrupt-controller;

>                                 reg = <0x14 4>;

>                                 interrupt-map =

> -                                       <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

> +                                       <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

>                                 interrupt-map-mask = <0xffffffff 0x0>;

>                         };

>                 };

> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

> index 801ba9612d36..38aea4fce238 100644

> --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

> +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

> @@ -293,18 +293,18 @@ extirq: interrupt-controller@14 {

>                                 interrupt-controller;

>                                 reg = <0x14 4>;

>                                 interrupt-map =

> -                                       <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

> +                                       <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

>                                 interrupt-map-mask = <0xffffffff 0x0>;

>                         };

>                 };

> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

> index c4b1a59ba424..dc8661ebd1f6 100644

> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

> @@ -680,18 +680,18 @@ extirq: interrupt-controller@14 {

>                                 interrupt-controller;

>                                 reg = <0x14 4>;

>                                 interrupt-map =

> -                                       <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

> -                                       <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

> +                                       <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,

> +                                       <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

>                                 interrupt-map-mask = <0xffffffff 0x0>;

>                         };

>                 };

> --

> 2.30.2

>
Shawn Guo Oct. 5, 2021, 6 a.m. UTC | #2
On Tue, Sep 28, 2021 at 02:21:54PM -0500, Rob Herring wrote:
> The 'interrupt-map' in several Layerscape SoCs is malformed. The

> '#address-cells' size of the parent interrupt controller (the GIC) is not

> accounted for.

> 

> Cc: Shawn Guo <shawnguo@kernel.org>

> Cc: Li Yang <leoyang.li@nxp.com>

> Cc: linux-arm-kernel@lists.infradead.org

> Signed-off-by: Rob Herring <robh@kernel.org>


Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index f85e437f80b7..84a31372b3fa 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -241,18 +241,18 @@  extirq: interrupt-controller@14 {
 				interrupt-controller;
 				reg = <0x14 4>;
 				interrupt-map =
-					<0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-					<1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-					<2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-					<3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-					<4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-					<5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-					<6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-					<7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-					<8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-					<9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-					<10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-					<11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+					<0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+					<1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+					<2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+					<3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+					<4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+					<5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+					<6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+					<7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+					<8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+					<9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+					<10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+					<11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-map-mask = <0xffffffff 0x0>;
 			};
 		};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 801ba9612d36..38aea4fce238 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -293,18 +293,18 @@  extirq: interrupt-controller@14 {
 				interrupt-controller;
 				reg = <0x14 4>;
 				interrupt-map =
-					<0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-					<1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-					<2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-					<3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-					<4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-					<5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-					<6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-					<7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-					<8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-					<9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-					<10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-					<11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+					<0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+					<1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+					<2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+					<3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+					<4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+					<5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+					<6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+					<7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+					<8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+					<9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+					<10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+					<11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-map-mask = <0xffffffff 0x0>;
 			};
 		};
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index c4b1a59ba424..dc8661ebd1f6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -680,18 +680,18 @@  extirq: interrupt-controller@14 {
 				interrupt-controller;
 				reg = <0x14 4>;
 				interrupt-map =
-					<0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-					<1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
-					<2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-					<3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-					<4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-					<5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-					<6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-					<7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
-					<8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-					<9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-					<10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-					<11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+					<0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+					<1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+					<2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+					<3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+					<4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+					<5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+					<6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+					<7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+					<8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+					<9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+					<10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+					<11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-map-mask = <0xffffffff 0x0>;
 			};
 		};