@@ -51,6 +51,10 @@ properties:
- const: ref
- const: iface
+ vdda-supply:
+ description:
+ Phandle to 0.9V regulator supply to PHY digital circuit.
+
vdda-pll-supply:
description:
Phandle to 1.8V regulator supply to PHY refclk pll block.
@@ -157,6 +161,7 @@ required:
- "#phy-cells"
- clocks
- clock-names
+ - vdd-supply
- vdda-pll-supply
- vdda-phy-dpdm-supply
- resets
@@ -175,6 +180,7 @@ examples:
<&gcc GCC_RX1_USB2_CLKREF_CLK>;
clock-names = "cfg_ahb", "ref";
+ vdd-supply = <&pm8994_l28>;
vdda-pll-supply = <&pm8994_l12>;
vdda-phy-dpdm-supply = <&pm8994_l24>;
Besides vdda-pll and vdda-phy-dpdm, vdd-supply is a required supply for PHY digital circuit operation. Add it for correctness and completeness. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> --- Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.17.1