Message ID | 20210825011120.30481-2-chun-jie.chen@mediatek.com |
---|---|
State | New |
Headers | show |
Series | [v1,1/5] arm64: dts: mediatek: Correct system timer clock of MT8192 | expand |
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index c7c7d4e017ae..2b63d2ea6cb6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -312,7 +312,7 @@ "mediatek,mt6765-timer"; reg = <0 0x10017000 0 0x1000>; interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&clk26m>; + clocks = <&topckgen CLK_TOP_CSW_F26M_D2>; clock-names = "clk13m"; };
update systimer clock to the real one. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)