Message ID | 1433256507-7856-6-git-send-email-shannon.zhao@linaro.org |
---|---|
State | New |
Headers | show
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[209.132.180.67]) by mx.google.com with ESMTP id hv8si26697315pdb.173.2015.06.02.07.49.21; Tue, 02 Jun 2015 07:49:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759032AbbFBOtS (ORCPT <rfc822;shannon.zhao@linaro.org> + 2 others); Tue, 2 Jun 2015 10:49:18 -0400 Received: from mail-oi0-f46.google.com ([209.85.218.46]:33561 "EHLO mail-oi0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932319AbbFBOtQ (ORCPT <rfc822;stable@vger.kernel.org>); Tue, 2 Jun 2015 10:49:16 -0400 Received: by oiww2 with SMTP id w2so127355437oiw.0 for <stable@vger.kernel.org>; Tue, 02 Jun 2015 07:49:15 -0700 (PDT) X-Received: by 10.202.93.4 with SMTP id r4mr22207845oib.92.1433256555557; Tue, 02 Jun 2015 07:49:15 -0700 (PDT) Received: from localhost ([167.160.116.34]) by mx.google.com with ESMTPSA id e200sm9607333oig.17.2015.06.02.07.49.13 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 02 Jun 2015 07:49:14 -0700 (PDT) From: shannon.zhao@linaro.org To: stable@vger.kernel.org Cc: gregkh@linuxfoundation.org, christoffer.dall@linaro.org, shannon.zhao@linaro.org, Li Liu <john.liuli@huawei.com>, Marc Zyngier <marc.zyngier@arm.com> Subject: [PATCH for 3.14.y stable 05/32] ARM: virt: fix wrong HSCTLR.EE bit setting Date: Tue, 2 Jun 2015 22:48:00 +0800 Message-Id: <1433256507-7856-6-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1433256507-7856-1-git-send-email-shannon.zhao@linaro.org> References: <1433256507-7856-1-git-send-email-shannon.zhao@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: list List-ID: <patchwork-forward.linaro.org> X-Mailing-List: stable@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. 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diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index 797b1a6..7e666cf 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -134,9 +134,7 @@ ENTRY(__hyp_stub_install_secondary) mcr p15, 4, r7, c1, c1, 3 @ HSTR THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE -#ifdef CONFIG_CPU_BIG_ENDIAN - orr r7, #(1 << 9) @ HSCTLR.EE -#endif +ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE mcr p15, 4, r7, c1, c0, 0 @ HSCTLR mrc p15, 4, r7, c1, c1, 1 @ HDCR