| Message ID | 20210801040544.104135-1-jitao.shi@mediatek.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v4,1/2] drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid screen shift | expand |
Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年8月1日 週日 下午12:06寫道： Move this patch before the patch "drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid screen shift", and this patch's title should be "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null" Regards, Chun-Kuang. > > The force_dsi_end_without_null requires the dsi host ent at > the same time in line. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > .../bindings/display/bridge/analogix,anx7625.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > index ab48ab2f4240..8b868a6a3d60 100644 > --- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > +++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml > @@ -43,6 +43,11 @@ properties: > vdd33-supply: > description: Regulator that provides the supply 3.3V power. > > + force_dsi_end_without_null: > + description: | > + Requires the dsi host send the dsi packets on all lanes aligned > + at the end. > + > ports: > $ref: /schemas/graph.yaml#/properties/ports > > @@ -87,6 +92,7 @@ examples: > vdd10-supply = <&pp1000_mipibrdg>; > vdd18-supply = <&pp1800_mipibrdg>; > vdd33-supply = <&pp3300_mipibrdg>; > + force_dsi_end_without_null; > > ports { > #address-cells = <1>; > -- > 2.25.1
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index ae403c67cbd9..4735e0092ffe 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -194,6 +194,8 @@ struct mtk_dsi { struct clk *hs_clk; u32 data_rate; + /* force dsi line end without dsi_null data */ + bool force_dsi_end_without_null; unsigned long mode_flags; enum mipi_dsi_pixel_format format; @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); } + if (dsi->force_dsi_end_without_null) { + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; + } + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); @@ -1095,6 +1104,10 @@ static int mtk_dsi_probe(struct platform_device *pdev) dsi->bridge.of_node = dev->of_node; dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; + if (dsi->next_bridge) + dsi->force_dsi_end_without_null = of_property_read_bool(dsi->next_bridge->of_node, + "force_dsi_end_without_null"); + drm_bridge_add(&dsi->bridge); ret = component_add(&pdev->dev, &mtk_dsi_component_ops);
The bridge chip ANX7625 requires the packets on lanes aligned at the end, or ANX7625 will shift the screen. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.25.1