@@ -33,6 +33,9 @@ static int lpass_cpu_daiops_set_sysclk(struct snd_soc_dai *dai, int clk_id,
struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
int ret;
+ if (IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id]))
+ return 0;
+
ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq);
if (ret)
dev_err(dai->dev, "%s() error setting mi2s osrclk to %u: %d\n",
@@ -47,18 +50,22 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream,
struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
int ret;
- ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->diver->id]);
- if (ret) {
- dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n",
- __func__, ret);
- return ret;
+ if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id])) {
+ ret = clk_prepare_enable(
+ drvdata->mi2s_osr_clk[dai->driver->id]);
+ if (ret) {
+ dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n",
+ __func__, ret);
+ return ret;
+ }
}
ret = clk_prepare_enable(drvdata->mi2s_bit_clk[dai->driver->id]);
if (ret) {
dev_err(dai->dev, "%s() error in enabling mi2s bit clk: %d\n",
__func__, ret);
- clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
+ if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id]))
+ clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
return ret;
}
@@ -71,7 +78,9 @@ static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream,
struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
clk_disable_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]);
- clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
+
+ if (!IS_ERR(drvdata->mi2s_osr_clk[dai->driver->id]))
+ clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
}
static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
@@ -408,11 +417,13 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
else
sprintf(clk_name, "mi2s-osr-clk");
- drvdata->mi2s_osr_clk[i] = devm_clk_get(&pdev->dev, clk_name);
+ drvdata->mi2s_osr_clk[i] = devm_clk_get(&pdev->dev,
+ clk_name);
if (IS_ERR(drvdata->mi2s_osr_clk[i])) {
- dev_err(&pdev->dev, "%s() error getting mi2s-osr-clk: %ld\n",
- __func__, PTR_ERR(drvdata->mi2s_osr_clk[i]));
- return PTR_ERR(drvdata->mi2s_osr_clk[i]);
+ dev_err(&pdev->dev,
+ "%s() error getting mi2s-osr-clk: %ld\n",
+ __func__,
+ PTR_ERR(drvdata->mi2s_osr_clk[i]));
}
}
Some LPASS integrations like on APQ8016 do not have OSR clk, so making osr clk optional would allow such integrations to use lpass driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- sound/soc/qcom/lpass-cpu.c | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-)