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[v2] i2c: mpc: Poll for MCF

Message ID 20210715205832.17879-1-chris.packham@alliedtelesis.co.nz
State Accepted
Commit 4a8ac5e45cdaa88884b4ce05303e304cbabeb367
Headers show
Series [v2] i2c: mpc: Poll for MCF | expand

Commit Message

Chris Packham July 15, 2021, 8:58 p.m. UTC
During some transfers the bus can still be busy when an interrupt is
received. Commit 763778cd7926 ("i2c: mpc: Restore reread of I2C status
register") attempted to address this by re-reading MPC_I2C_SR once but
that just made it less likely to happen without actually preventing it.
Instead of a single re-read, poll with a timeout so that the bus is given
enough time to settle but a genuine stuck SCL is still noticed.

Fixes: 1538d82f4647 ("i2c: mpc: Interrupt driven transfer")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---

Notes:
    Changes in v2:
    - grammar fix in commit message
    - add comment above poll

 drivers/i2c/busses/i2c-mpc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Wolfram Sang July 20, 2021, 8:33 p.m. UTC | #1
On Fri, Jul 16, 2021 at 08:58:32AM +1200, Chris Packham wrote:
> During some transfers the bus can still be busy when an interrupt is

> received. Commit 763778cd7926 ("i2c: mpc: Restore reread of I2C status

> register") attempted to address this by re-reading MPC_I2C_SR once but

> that just made it less likely to happen without actually preventing it.

> Instead of a single re-read, poll with a timeout so that the bus is given

> enough time to settle but a genuine stuck SCL is still noticed.

> 

> Fixes: 1538d82f4647 ("i2c: mpc: Interrupt driven transfer")

> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>


Applied to for-current, thanks!
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 6d5014ebaab5..a6ea1eb1394e 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -635,8 +635,8 @@  static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
 
 	status = readb(i2c->base + MPC_I2C_SR);
 	if (status & CSR_MIF) {
-		/* Read again to allow register to stabilise */
-		status = readb(i2c->base + MPC_I2C_SR);
+		/* Wait up to 100us for transfer to properly complete */
+		readb_poll_timeout(i2c->base + MPC_I2C_SR, status, !(status & CSR_MCF), 0, 100);
 		writeb(0, i2c->base + MPC_I2C_SR);
 		mpc_i2c_do_intr(i2c, status);
 		return IRQ_HANDLED;