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[RFC,v1,215/256] cl8k: add tx/tx_amsdu.h

Message ID 20210617160223.160998-216-viktor.barna@celeno.com
State New
Headers show
Series wireless: cl8k driver for Celeno IEEE 802.11ax devices | expand

Commit Message

Viktor Barna June 17, 2021, 4:01 p.m. UTC 
From: Viktor Barna <viktor.barna@celeno.com>

(Part of the split. Please, take a look at the cover letter for more
details).

Signed-off-by: Viktor Barna <viktor.barna@celeno.com>
---
 .../net/wireless/celeno/cl8k/tx/tx_amsdu.h    | 43 +++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 drivers/net/wireless/celeno/cl8k/tx/tx_amsdu.h

--
2.30.0
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Patch

diff --git a/drivers/net/wireless/celeno/cl8k/tx/tx_amsdu.h b/drivers/net/wireless/celeno/cl8k/tx/tx_amsdu.h
new file mode 100644
index 000000000000..efabed0c561c
--- /dev/null
+++ b/drivers/net/wireless/celeno/cl8k/tx/tx_amsdu.h
@@ -0,0 +1,43 @@ 
+/* SPDX-License-Identifier: MIT */
+/* Copyright(c) 2019-2021, Celeno Communications Ltd. */
+
+#ifndef CL_TX_AMSDU_H
+#define CL_TX_AMSDU_H
+
+#include "sta.h"
+
+enum cl_amsdu_result {
+       CL_AMSDU_ANCHOR_SET,
+       CL_AMSDU_SUB_FRAME_SET,
+       CL_AMSDU_SKIP,
+       CL_AMSDU_FAILED
+};
+
+/* Max size of 802.11 WLAN header */
+#define CL_WLAN_HEADER_MAX_SIZE 36
+
+#define CL_AMSDU_MIN_AGG_SIZE 3
+#define CL_AMSDU_CONST_LEN    256
+
+struct cl_amsdu_txhdr {
+       struct list_head list;
+       struct list_head list_pool;
+       struct sk_buff *skb;
+       dma_addr_t dma_addr;
+};
+
+void cl_tx_amsdu_anchor_init(struct cl_amsdu_ctrl *amsdu_anchor);
+void cl_tx_amsdu_anchor_reset(struct cl_amsdu_ctrl *amsdu_anchor);
+void cl_tx_amsdu_set_max_len(struct cl_hw *cl_hw, struct cl_sta *cl_sta, u8 tid);
+void cl_tx_amsdu_first_sub_frame(struct cl_sw_txhdr *sw_txhdr, struct cl_sta *cl_sta,
+                                struct sk_buff *skb, u8 tid);
+void cl_tx_amsdu_flush_sub_frames(struct cl_hw *cl_hw, struct cl_sw_txhdr *sw_txhdr);
+void cl_tx_amsdu_transfer_single(struct cl_hw *cl_hw, struct cl_sw_txhdr *sw_txhdr);
+int cl_tx_amsdu_set(struct cl_hw *cl_hw, struct cl_sta *cl_sta, struct sk_buff *skb, u8 tid);
+void cl_tx_amsdu_unset(struct cl_sw_txhdr *sw_txhdr);
+
+int cl_tx_amsdu_txhdr_init(struct cl_hw *cl_hw);
+void cl_tx_amsdu_txhdr_deinit(struct cl_hw *cl_hw);
+void cl_tx_amsdu_txhdr_free(struct cl_hw *cl_hw, struct cl_amsdu_txhdr *amsdu_txhdr);
+
+#endif /* CL_TX_AMSDU_H */