| Message ID | 20210607190546.2616259-1-sean.anderson@seco.com |
|---|---|
| State | Accepted |
| Commit | 89f8a707d00890d302f6d4320d4ecdba12c26bdf |
| Headers | show |
| Series | dt-bindings: clk: vc5: Fix example | expand |
Hi Sean, On 07/06/21 21:05, Sean Anderson wrote: > The example properties do not match the binding. Fix them, and prohibit > undocumented properties in clock nodes to prevent this from happening in > the future. > > Fixes: 766e1b8608bf ("dt-bindings: clk: versaclock5: convert to yaml") > Signed-off-by: Sean Anderson <sean.anderson@seco.com> Ick, how many mistakes did I put in that darn commit? Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> -- Luca
On Mon, 07 Jun 2021 15:05:46 -0400, Sean Anderson wrote: > The example properties do not match the binding. Fix them, and prohibit > undocumented properties in clock nodes to prevent this from happening in > the future. > > Fixes: 766e1b8608bf ("dt-bindings: clk: versaclock5: convert to yaml") > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > .../devicetree/bindings/clock/idt,versaclock5.yaml | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > Applied, thanks!
diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml index 28675b0b80f1..26ed040bc717 100644 --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml @@ -84,6 +84,7 @@ patternProperties: idt,slew-percent: description: The Slew rate control for CMOS single-ended. enum: [ 80, 85, 90, 100 ] + additionalProperties: false required: - compatible @@ -139,13 +140,13 @@ examples: clock-names = "xin"; OUT1 { - idt,drive-mode = <VC5_CMOSD>; - idt,voltage-microvolts = <1800000>; + idt,mode = <VC5_CMOSD>; + idt,voltage-microvolt = <1800000>; idt,slew-percent = <80>; }; OUT4 { - idt,drive-mode = <VC5_LVDS>; + idt,mode = <VC5_LVDS>; }; }; };
The example properties do not match the binding. Fix them, and prohibit undocumented properties in clock nodes to prevent this from happening in the future. Fixes: 766e1b8608bf ("dt-bindings: clk: versaclock5: convert to yaml") Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- .../devicetree/bindings/clock/idt,versaclock5.yaml | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)