diff mbox series

[v2,11/11] ASoC: rsnd: tidyup rsnd_ssiu_busif_err_irq_ctrl()

Message ID 87sg28lwxw.wl-kuninori.morimoto.gx@renesas.com
State Accepted
Commit 0ab000e5e57e6dcb34605fbdee92a1b0947606e0
Headers show
Series ASoC: rsnd: tidyup and fixup rare MIXer issue | expand

Commit Message

Kuninori Morimoto May 27, 2021, 2:42 a.m. UTC 
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

rsnd_ssiu_busif_err_irq_ctrl() has very similar duplicated code.
This patch merge and tidyup the code.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 sound/soc/sh/rcar/ssiu.c | 38 +++++++++++++++++---------------------
 1 file changed, 17 insertions(+), 21 deletions(-)
diff mbox series

Patch

diff --git a/sound/soc/sh/rcar/ssiu.c b/sound/soc/sh/rcar/ssiu.c
index b79628761167..4363508e8250 100644
--- a/sound/soc/sh/rcar/ssiu.c
+++ b/sound/soc/sh/rcar/ssiu.c
@@ -50,8 +50,8 @@  static const int gen3_id[] = { 0, 8, 16, 24, 32, 40, 41, 42, 43, 44 };
 #define rsnd_ssiu_busif_err_irq_disable(mod) rsnd_ssiu_busif_err_irq_ctrl(mod, 0)
 static void rsnd_ssiu_busif_err_irq_ctrl(struct rsnd_mod *mod, int enable)
 {
-	u32 sys_int_enable = 0;
 	int id = rsnd_mod_id(mod);
+	int shift, offset;
 	int i;
 
 	switch (id) {
@@ -60,30 +60,26 @@  static void rsnd_ssiu_busif_err_irq_ctrl(struct rsnd_mod *mod, int enable)
 	case 2:
 	case 3:
 	case 4:
-		for (i = 0; i < 4; i++) {
-			sys_int_enable = rsnd_mod_read(mod, SSI_SYS_INT_ENABLE(i * 2));
-			if (enable)
-				sys_int_enable |= 0xf << (id * 4);
-			else
-				sys_int_enable &= ~(0xf << (id * 4));
-			rsnd_mod_write(mod,
-				       SSI_SYS_INT_ENABLE(i * 2),
-				       sys_int_enable);
-		}
+		shift  = id;
+		offset = 0;
 		break;
 	case 9:
-		for (i = 0; i < 4; i++) {
-			sys_int_enable = rsnd_mod_read(mod, SSI_SYS_INT_ENABLE((i * 2) + 1));
-			if (enable)
-				sys_int_enable |= 0xf << 4;
-			else
-				sys_int_enable &= ~(0xf << 4);
-			rsnd_mod_write(mod,
-				       SSI_SYS_INT_ENABLE((i * 2) + 1),
-				       sys_int_enable);
-		}
+		shift  = 1;
+		offset = 1;
 		break;
 	}
+
+	for (i = 0; i < 4; i++) {
+		enum rsnd_reg reg = SSI_SYS_INT_ENABLE((i * 2) + offset);
+		u32 val = 0xf << (shift * 4);
+		u32 sys_int_enable = rsnd_mod_read(mod, reg);
+
+		if (enable)
+			sys_int_enable |= val;
+		else
+			sys_int_enable &= ~val;
+		rsnd_mod_write(mod, reg, sys_int_enable);
+	}
 }
 
 bool rsnd_ssiu_busif_err_status_clear(struct rsnd_mod *mod)