Message ID | 20210514192218.13022-4-prabhakar.mahadev-lad.rj@bp.renesas.com |
---|---|
State | New |
Headers | show |
Series | Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support | expand |
Hi Prabhakar, On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > Document Renesas SMARC EVK boards which are based on RZ/G2L (R9A07G044L) > SoC. The SMARC EVK consists of RZ/G2L SoM module and SMARC carrier board, > the SoM module sits on top of carrier board. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> > --- a/Documentation/devicetree/bindings/arm/renesas.yaml > +++ b/Documentation/devicetree/bindings/arm/renesas.yaml > @@ -310,6 +310,9 @@ properties: > > - description: RZ/G2{L,LC} (R9A07G044) > items: > + - enum: > + - renesas,smarc-r9a07g044l1 # SMARC EVK with single Cortex-A55 > + - renesas,smarc-r9a07g044l2 # SMARC EVK with dual Cortex-A55 > - enum: > - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC > - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC Likewise, do we care (at the top level) if this is a board with an SoC die that has one or two Cortex-A55 cores enabled? Gr{oetje,eeting}s, Geert
diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 626757d6617e..74dee6a0d2af 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -310,6 +310,9 @@ properties: - description: RZ/G2{L,LC} (R9A07G044) items: + - enum: + - renesas,smarc-r9a07g044l1 # SMARC EVK with single Cortex-A55 + - renesas,smarc-r9a07g044l2 # SMARC EVK with dual Cortex-A55 - enum: - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC