[2/4] i2c: stm32f4: Fix stmpe811 get xyz data timeout issue

From: Dillon Min <dillon.minfei@gmail.com>

As stm32f429's internal flash is 2Mbytes and compiled kernel
image bigger than 2Mbytes, so we have to load kernel image
to sdram on stm32f429-disco board which has 8Mbytes sdram space.

based on above context, as you knows kernel running on external
sdram is more slower than internal flash. besides, we need read 4
bytes to get touch screen xyz(x, y, pressure) coordinate data in
stmpe811 interrupt.

so, in stm32f4_i2c_handle_rx_done, as i2c read slower than running
in xip mode, have to adjust 'STOP/START bit set position' from last
two bytes to last one bytes. else, will get i2c timeout in reading
touch screen coordinate.

to not bring in side effect, introduce IIC_LAST_BYTE_POS to support xip
kernel or zImage.

Fixes: 62817fc8d282 ("i2c: stm32f4: add driver")
Link: https://lore.kernel.org/lkml/1591709203-12106-5-git-send-email-dillon.minfei@gmail.com/
Signed-off-by: Dillon Min <dillon.minfei@gmail.com>
---
 drivers/i2c/busses/i2c-stm32f4.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

Hi Patrice, Pierre-Yves, Alain

On Tue, Jun 1, 2021 at 7:43 PM Patrice CHOTARD
<patrice.chotard@foss.st.com> wrote:
>

> Hi Dillon

>

> On 5/14/21 1:02 PM, dillon.minfei@gmail.com wrote:

> > From: Dillon Min <dillon.minfei@gmail.com>

> >

> > As stm32f429's internal flash is 2Mbytes and compiled kernel

> > image bigger than 2Mbytes, so we have to load kernel image

> > to sdram on stm32f429-disco board which has 8Mbytes sdram space.

> >

> > based on above context, as you knows kernel running on external

> > sdram is more slower than internal flash. besides, we need read 4

> > bytes to get touch screen xyz(x, y, pressure) coordinate data in

> > stmpe811 interrupt.

> >

> > so, in stm32f4_i2c_handle_rx_done, as i2c read slower than running

> > in xip mode, have to adjust 'STOP/START bit set position' from last

> > two bytes to last one bytes. else, will get i2c timeout in reading

> > touch screen coordinate.

> >

> > to not bring in side effect, introduce IIC_LAST_BYTE_POS to support xip

> > kernel or zImage.

> >

> > Fixes: 62817fc8d282 ("i2c: stm32f4: add driver")

> > Link: https://lore.kernel.org/lkml/1591709203-12106-5-git-send-email-dillon.minfei@gmail.com/

> > Signed-off-by: Dillon Min <dillon.minfei@gmail.com>

> > ---

> >  drivers/i2c/busses/i2c-stm32f4.c | 12 +++++++++---

> >  1 file changed, 9 insertions(+), 3 deletions(-)

> >

> > diff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c

> > index 4933fc8ce3fd..2e41231b9037 100644

> > --- a/drivers/i2c/busses/i2c-stm32f4.c

> > +++ b/drivers/i2c/busses/i2c-stm32f4.c

> > @@ -93,6 +93,12 @@

> >  #define STM32F4_I2C_MAX_FREQ         46U

> >  #define HZ_TO_MHZ                    1000000

> >

> > +#if !defined(CONFIG_MMU) && !defined(CONFIG_XIP_KERNEL)

> > +#define IIC_LAST_BYTE_POS 1

> > +#else

> > +#define IIC_LAST_BYTE_POS 2

> > +#endif

> > +

> >  /**

> >   * struct stm32f4_i2c_msg - client specific data

> >   * @addr: 8-bit slave addr, including r/w bit

> > @@ -439,7 +445,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev)

> >       int i;

> >

> >       switch (msg->count) {

> > -     case 2:

> > +     case IIC_LAST_BYTE_POS:

> >               /*

> >                * In order to correctly send the Stop or Repeated Start

> >                * condition on the I2C bus, the STOP/START bit has to be set

> > @@ -454,7 +460,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev)

> >               else

> >                       stm32f4_i2c_set_bits(reg, STM32F4_I2C_CR1_START);

> >

> > -             for (i = 2; i > 0; i--)

> > +             for (i = IIC_LAST_BYTE_POS; i > 0; i--)

> >                       stm32f4_i2c_read_msg(i2c_dev);

> >

> >               reg = i2c_dev->base + STM32F4_I2C_CR2;

> > @@ -463,7 +469,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev)

> >

> >               complete(&i2c_dev->complete);

> >               break;

> > -     case 3:

> > +     case (IIC_LAST_BYTE_POS+1):

> >               /*

> >                * In order to correctly generate the NACK pulse after the last

> >                * received data byte, we have to enable NACK before reading N-2

> >

>

> I tested this patch on STM32F429-Disco, it fixes the issue described by Dillon.

> But i think it's not a good idea to make usage of #if !defined(CONFIG_MMU) && !defined(CONFIG_XIP_KERNEL)

> inside the driver code.


Hi Patrice,
Thanks for your time.

How about introducing a dts node for this purpose.
like
stm32-i2c,last-byte-pos = <1>;
or
stm32-i2c,last-byte-pos = <2>;

if not set, the default value is 2

Best Regards
Dillon

>

> Pierre-Yves, Alain, as i am not I2C expert, can you have a look at this patch and propose another solution

> to fix the original issue described by Dillon ?

>

> Thanks

> Patrice