diff mbox series

pinctrl: npcm: Align a few entries in the pin function table

Message ID 20210513160947.1716185-1-j.neuschaefer@gmx.net
State Accepted
Commit 9b882b73d37932a5ba20d7fdcbe6e3191d9582cd
Headers show
Series pinctrl: npcm: Align a few entries in the pin function table | expand

Commit Message

J. Neuschäfer May 13, 2021, 4:09 p.m. UTC 
The entries for GPIO 33 and 34 are not properly aligned. Fix the
alignment.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--
2.30.2

Comments

Linus Walleij May 19, 2021, 11:52 p.m. UTC | #1 
On Thu, May 13, 2021 at 6:09 PM Jonathan Neuschäfer
<j.neuschaefer@gmx.net> wrote:

> The entries for GPIO 33 and 34 are not properly aligned. Fix the

> alignment.

>

> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>


Patch applied.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
index 2535ca720668e..bb1ea47ec4c60 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
@@ -958,8 +958,8 @@  static const struct npcm7xx_pincfg pincfg[] = {
 	NPCM7XX_PINCFG(31,	 smb3, MFSEL1, 0,	  none, NONE, 0,	none, NONE, 0,	     0),

 	NPCM7XX_PINCFG(32,    spi0cs1, MFSEL1, 3,	  none, NONE, 0,	none, NONE, 0,	     0),
-	NPCM7XX_PINCFG(33,   none, NONE, 0,     none, NONE, 0,	none, NONE, 0,	     SLEW),
-	NPCM7XX_PINCFG(34,   none, NONE, 0,     none, NONE, 0,	none, NONE, 0,	     SLEW),
+	NPCM7XX_PINCFG(33,	 none, NONE, 0,           none, NONE, 0,	none, NONE, 0,	     SLEW),
+	NPCM7XX_PINCFG(34,	 none, NONE, 0,           none, NONE, 0,	none, NONE, 0,	     SLEW),
 	NPCM7XX_PINCFG(37,	smb3c, I2CSEGSEL, 12,	  none, NONE, 0,	none, NONE, 0,	     SLEW),
 	NPCM7XX_PINCFG(38,	smb3c, I2CSEGSEL, 12,	  none, NONE, 0,	none, NONE, 0,	     SLEW),
 	NPCM7XX_PINCFG(39,	smb3b, I2CSEGSEL, 11,	  none, NONE, 0,	none, NONE, 0,	     SLEW),