Message ID | 20210513233024.2076725-2-t.schramm@manjaro.org |
---|---|
State | Superseded |
Headers | show |
Series | [v2,1/7] ARM: dts: sun8i: v3s: add DMA controller to v3s dts | expand |
On Fri, 14 May 2021 01:30:18 +0200 Tobias Schramm <t.schramm@manjaro.org> wrote: > The Allwinner V3s and V3 feature a DMA controller. > This commit adds it to the V3s dtsi. > > Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Address, interrupt and clocks/reset match the manual. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > --- > arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi > index eb4cb63fef13..f0296ab46137 100644 > --- a/arch/arm/boot/dts/sun8i-v3s.dtsi > +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi > @@ -1,5 +1,6 @@ > /* > * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> > + * Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org> > * > * This file is dual-licensed: you can use it either under the terms > * of the GPL or the X11 license, at your option. Note that this dual > @@ -172,6 +173,15 @@ nmi_intc: interrupt-controller@1c000d0 { > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > }; > > + dma: dma-controller@1c02000 { > + compatible = "allwinner,sun8i-v3s-dma"; > + reg = <0x01c02000 0x1000>; > + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_DMA>; > + resets = <&ccu RST_BUS_DMA>; > + #dma-cells = <1>; > + }; > + > tcon0: lcd-controller@1c0c000 { > compatible = "allwinner,sun8i-v3s-tcon"; > reg = <0x01c0c000 0x1000>;
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index eb4cb63fef13..f0296ab46137 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -1,5 +1,6 @@ /* * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz> + * Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -172,6 +173,15 @@ nmi_intc: interrupt-controller@1c000d0 { interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; }; + dma: dma-controller@1c02000 { + compatible = "allwinner,sun8i-v3s-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMA>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; + tcon0: lcd-controller@1c0c000 { compatible = "allwinner,sun8i-v3s-tcon"; reg = <0x01c0c000 0x1000>;
The Allwinner V3s and V3 feature a DMA controller. This commit adds it to the V3s dtsi. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)