| Message ID | 20210429073331.21204-2-peng.fan@oss.nxp.com |
|---|---|
| State | Superseded |
| Headers | show
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Thu, 29 Apr 2021 07:01:33 +0000 From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ping.bai@nxp.com, frieder.schrempf@kontron.de, aford173@gmail.com, abel.vesa@nxp.com, Peng Fan <peng.fan@nxp.com> Subject: [PATCH 1/4] dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains Date: Thu, 29 Apr 2021 15:33:28 +0800 Message-Id: <20210429073331.21204-2-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210429073331.21204-1-peng.fan@oss.nxp.com> References: <20210429073331.21204-1-peng.fan@oss.nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: HK2PR06CA0016.apcprd06.prod.outlook.com (2603:1096:202:2e::28) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by HK2PR06CA0016.apcprd06.prod.outlook.com (2603:1096:202:2e::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4087.28 via Frontend Transport; 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soc: imx: add i.MX BLK-CTL support
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expand
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diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h index fc9c2e16aadc..510e383d1953 100644 --- a/include/dt-bindings/power/imx8mm-power.h +++ b/include/dt-bindings/power/imx8mm-power.h @@ -19,4 +19,15 @@ #define IMX8MM_POWER_DOMAIN_DISPMIX 10 #define IMX8MM_POWER_DOMAIN_MIPI 11 +#define IMX8MM_BLK_CTL_G2_PD 0 +#define IMX8MM_BLK_CTL_G1_PD 1 +#define IMX8MM_BLK_CTL_H1_PD 2 +#define IMX8MM_BLK_CTL_MAX_PD 3 + +#define IMX8MM_BLK_CTL_DISPMIX_CSI_BRIDGE 0 +#define IMX8MM_BLK_CTL_DISPMIX_LCDIF 1 +#define IMX8MM_BLK_CTL_DISPMIX_MIPI_DSI 2 +#define IMX8MM_BLK_CTL_DISPMIX_MIPI_CSI 3 +#define IMX8MM_BLK_CTL_DISPMIX_MAX_PD 4 + #endif