| Message ID | 20210426070654.8703-1-qiangqing.zhang@nxp.com |
|---|---|
| State | Accepted |
| Commit | dc6d5dc89bad410cc58688f0b73452957bf95020 |
| Headers | show |
| Series | arm64: dts: imx8mp-evk: enable EQOS ethernet | expand |
Kindly pinging... Best Regards, Joakim Zhang > -----Original Message----- > From: Joakim Zhang <qiangqing.zhang@nxp.com> > Sent: 2021年4月26日 15:07 > To: robh+dt@kernel.org; shawnguo@kernel.org; s.hauer@pengutronix.de; > festevam@gmail.com > Cc: dl-linux-imx <linux-imx@nxp.com>; kernel@pengutronix.de; > devicetree@vger.kernel.org > Subject: [PATCH] arm64: dts: imx8mp-evk: enable EQOS ethernet > > Enable EQOS ethernet on i.MX8MP EVK board. > > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 40 ++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > index 2c28e589677e..fae6aa4c6b7b 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > @@ -81,6 +81,26 @@ > status = "disabled";/* can2 pin conflict with pdm */ }; > > +&eqos { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_eqos>; > + phy-mode = "rgmii-id"; > + phy-handle = <ðphy0>; > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy0: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + eee-broken-1000t; > + }; > + }; > +}; > + > &fec { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_fec>; > @@ -177,6 +197,26 @@ > }; > > &iomuxc { > + pinctrl_eqos: eqosgrp { > + fsl,pins = < > + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC > 0x3 > + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO > 0x3 > + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 > 0x91 > + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 > 0x91 > + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 > 0x91 > + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 > 0x91 > + > MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_ > CLK 0x91 > + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL > 0x91 > + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 > 0x1f > + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 > 0x1f > + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 > 0x1f > + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 > 0x1f > + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL > 0x1f > + > MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_ > CLK 0x1f > + MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x19 > + >; > + }; > + > pinctrl_fec: fecgrp { > fsl,pins = < > MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 > -- > 2.17.1
On Mon, Apr 26, 2021 at 03:06:54PM +0800, Joakim Zhang wrote: > Enable EQOS ethernet on i.MX8MP EVK board. > > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index 2c28e589677e..fae6aa4c6b7b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -81,6 +81,26 @@ status = "disabled";/* can2 pin conflict with pdm */ }; +&eqos { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eqos>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + eee-broken-1000t; + }; + }; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; @@ -177,6 +197,26 @@ }; &iomuxc { + pinctrl_eqos: eqosgrp { + fsl,pins = < + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91 + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91 + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91 + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91 + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91 + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91 + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f + MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x19 + >; + }; + pinctrl_fec: fecgrp { fsl,pins = < MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3
Enable EQOS ethernet on i.MX8MP EVK board. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 40 ++++++++++++++++++++ 1 file changed, 40 insertions(+)