diff mbox series

[net] dsa: mv88e6xxx: 6161: Use chip wide MAX MTU

Message ID 20210426233441.302414-1-andrew@lunn.ch
State Superseded
Headers show
Series [net] dsa: mv88e6xxx: 6161: Use chip wide MAX MTU | expand

Commit Message

Andrew Lunn April 26, 2021, 11:34 p.m. UTC
The datasheets suggests the 6161 uses a per port setting for jumbo
frames. Testing has however shown this is not correct, it uses the old
style chip wide MTU control. Change the ops in the 6161 structure to
reflect this.

Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")
Reported by: 曹煜 <cao88yu@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Andrew Lunn April 26, 2021, 11:36 p.m. UTC | #1
On Tue, Apr 27, 2021 at 01:34:41AM +0200, Andrew Lunn wrote:
> The datasheets suggests the 6161 uses a per port setting for jumbo
> frames. Testing has however shown this is not correct, it uses the old
> style chip wide MTU control. Change the ops in the 6161 structure to
> reflect this.
> 
> Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")
> Reported by: 曹煜 <cao88yu@gmail.com>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>

Hi Dave

I have no way to test this. Please don't commit it until we get feedback from 曹煜.

Thanks
	Andrew
曹煜 April 27, 2021, 12:18 a.m. UTC | #2
Hi Andrew,
I'll test the patch later, but what about the 88e6171r switch chip,
this chip also got this issue since kernel 5.9.0 Many thanks.

Andrew Lunn <andrew@lunn.ch> 于2021年4月27日周二 上午7:37写道:
>
> On Tue, Apr 27, 2021 at 01:34:41AM +0200, Andrew Lunn wrote:
> > The datasheets suggests the 6161 uses a per port setting for jumbo
> > frames. Testing has however shown this is not correct, it uses the old
> > style chip wide MTU control. Change the ops in the 6161 structure to
> > reflect this.
> >
> > Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")
> > Reported by: 曹煜 <cao88yu@gmail.com>
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
>
> Hi Dave
>
> I have no way to test this. Please don't commit it until we get feedback from 曹煜.
>
> Thanks
>         Andrew
Andrew Lunn April 27, 2021, 1:35 a.m. UTC | #3
On Tue, Apr 27, 2021 at 08:18:00AM +0800, 曹煜 wrote:
> Hi Andrew,

> I'll test the patch later, but what about the 88e6171r switch chip,

> this chip also got this issue since kernel 5.9.0 Many thanks.


Saying the 6171 is wrong i have problems with.

The 6161 is part of the 6165 family, consisting of 6123, 6161 and
6165. The 6123 was already using mv88e6185_g1_set_max_frame_size, and
the documentation is ambiguous.

The 6171 is part of the 6351 family: 6171 6175 6350 6351. It is a
couple of generations newer, and all the other members of the family
also use mv88e6165_port_set_jumbo_size. I have the GPL licensed SDK
from Marvell. If i'm reading the SDK correctly, it has a function to
access the per port register for jumbo settings for the 6351 family.

Do you have a 6171 we can test code on?

   Andrew
Andrew Lunn April 30, 2021, 2:01 p.m. UTC | #4
On Tue, Apr 27, 2021 at 01:34:41AM +0200, Andrew Lunn wrote:
> The datasheets suggests the 6161 uses a per port setting for jumbo

> frames. Testing has however shown this is not correct, it uses the old

> style chip wide MTU control. Change the ops in the 6161 structure to

> reflect this.

> 

> Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")

> Reported by: 曹煜 <cao88yu@gmail.com>

> Signed-off-by: Andrew Lunn <andrew@lunn.ch>


self NACK.

We dug deeper and found a different real problem. Patches to follow.

   Andrew
Chris Packham May 3, 2021, 2:38 a.m. UTC | #5
On 1/05/21 2:01 am, Andrew Lunn wrote:
> On Tue, Apr 27, 2021 at 01:34:41AM +0200, Andrew Lunn wrote:

>> The datasheets suggests the 6161 uses a per port setting for jumbo

>> frames. Testing has however shown this is not correct, it uses the old

>> style chip wide MTU control. Change the ops in the 6161 structure to

>> reflect this.

>>

>> Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")

>> Reported by: 曹煜 <cao88yu@gmail.com>

>> Signed-off-by: Andrew Lunn <andrew@lunn.ch>

> self NACK.

>

> We dug deeper and found a different real problem. Patches to follow.


Hi Andrew,

I'm back on-line now. Anything I can help look at?
Andrew Lunn May 3, 2021, 12:16 p.m. UTC | #6
On Mon, May 03, 2021 at 02:38:14AM +0000, Chris Packham wrote:
> 

> On 1/05/21 2:01 am, Andrew Lunn wrote:

> > On Tue, Apr 27, 2021 at 01:34:41AM +0200, Andrew Lunn wrote:

> >> The datasheets suggests the 6161 uses a per port setting for jumbo

> >> frames. Testing has however shown this is not correct, it uses the old

> >> style chip wide MTU control. Change the ops in the 6161 structure to

> >> reflect this.

> >>

> >> Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")

> >> Reported by: 曹煜 <cao88yu@gmail.com>

> >> Signed-off-by: Andrew Lunn <andrew@lunn.ch>

> > self NACK.

> >

> > We dug deeper and found a different real problem. Patches to follow.

> 

> Hi Andrew,

> 

> I'm back on-line now. Anything I can help look at?


Hi Chris

I have patches to post soon. I will include you in Cc:.

  Andrew
diff mbox series

Patch

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index e08bf9377140..42941dd950fa 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3502,7 +3502,6 @@  static const struct mv88e6xxx_ops mv88e6161_ops = {
 	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,
 	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,
 	.port_set_ether_type = mv88e6351_port_set_ether_type,
-	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
 	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
 	.port_pause_limit = mv88e6097_port_pause_limit,
 	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -3527,6 +3526,7 @@  static const struct mv88e6xxx_ops mv88e6161_ops = {
 	.avb_ops = &mv88e6165_avb_ops,
 	.ptp_ops = &mv88e6165_ptp_ops,
 	.phylink_validate = mv88e6185_phylink_validate,
+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,
 };
 
 static const struct mv88e6xxx_ops mv88e6165_ops = {