| Message ID | 20210423014741.11858-3-ansuelsmth@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | Multiple improvement to qca8k stability | expand |
On 4/22/2021 6:47 PM, Ansuel Smith wrote: > The original code had the internal dalay set to 1 for tx and 2 for rx. > Apply the oem internal dalay to fix some switch communication error. > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- > drivers/net/dsa/qca8k.c | 6 ++++-- > drivers/net/dsa/qca8k.h | 9 ++++----- > 2 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c > index a6d35b825c0e..b8bfc7acf6f4 100644 > --- a/drivers/net/dsa/qca8k.c > +++ b/drivers/net/dsa/qca8k.c > @@ -849,8 +849,10 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, > */ > qca8k_write(priv, reg, > QCA8K_PORT_PAD_RGMII_EN | > - QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) | > - QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY)); > + QCA8K_PORT_PAD_RGMII_TX_DELAY(1) | > + QCA8K_PORT_PAD_RGMII_RX_DELAY(2) | > + QCA8K_PORT_PAD_RGMII_TX_DELAY_EN | > + QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); There are standard properties in order to configure a specific RX and TX delay: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml#n125 can you use that mechanism and parse that property, or if nothing else, allow an user to override delays via device tree using these standard properties?
On Thu, Apr 22, 2021 at 06:53:45PM -0700, Florian Fainelli wrote: > > > On 4/22/2021 6:47 PM, Ansuel Smith wrote: > > The original code had the internal dalay set to 1 for tx and 2 for rx. > > Apply the oem internal dalay to fix some switch communication error. > > > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > > --- > > drivers/net/dsa/qca8k.c | 6 ++++-- > > drivers/net/dsa/qca8k.h | 9 ++++----- > > 2 files changed, 8 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c > > index a6d35b825c0e..b8bfc7acf6f4 100644 > > --- a/drivers/net/dsa/qca8k.c > > +++ b/drivers/net/dsa/qca8k.c > > @@ -849,8 +849,10 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, > > */ > > qca8k_write(priv, reg, > > QCA8K_PORT_PAD_RGMII_EN | > > - QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) | > > - QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY)); > > + QCA8K_PORT_PAD_RGMII_TX_DELAY(1) | > > + QCA8K_PORT_PAD_RGMII_RX_DELAY(2) | > > + QCA8K_PORT_PAD_RGMII_TX_DELAY_EN | > > + QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); > > There are standard properties in order to configure a specific RX and TX > delay: > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml#n125 > > can you use that mechanism and parse that property, or if nothing else, > allow an user to override delays via device tree using these standard > properties? Since this is mac config, what would be the best way to parse these data? Parse them in the qca8k_setup and put them in the qca8k_priv? > -- > Florian
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index a6d35b825c0e..b8bfc7acf6f4 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -849,8 +849,10 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, */ qca8k_write(priv, reg, QCA8K_PORT_PAD_RGMII_EN | - QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) | - QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY)); + QCA8K_PORT_PAD_RGMII_TX_DELAY(1) | + QCA8K_PORT_PAD_RGMII_RX_DELAY(2) | + QCA8K_PORT_PAD_RGMII_TX_DELAY_EN | + QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); break; diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 7ca4b93e0bb5..e0b679133880 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -32,12 +32,11 @@ #define QCA8K_REG_PORT5_PAD_CTRL 0x008 #define QCA8K_REG_PORT6_PAD_CTRL 0x00c #define QCA8K_PORT_PAD_RGMII_EN BIT(26) -#define QCA8K_PORT_PAD_RGMII_TX_DELAY(x) \ - ((0x8 + (x & 0x3)) << 22) -#define QCA8K_PORT_PAD_RGMII_RX_DELAY(x) \ - ((0x10 + (x & 0x3)) << 20) -#define QCA8K_MAX_DELAY 3 +#define QCA8K_PORT_PAD_RGMII_TX_DELAY(x) ((x) << 22) +#define QCA8K_PORT_PAD_RGMII_RX_DELAY(x) ((x) << 20) +#define QCA8K_PORT_PAD_RGMII_TX_DELAY_EN BIT(25) #define QCA8K_PORT_PAD_RGMII_RX_DELAY_EN BIT(24) +#define QCA8K_MAX_DELAY 3 #define QCA8K_PORT_PAD_SGMII_EN BIT(7) #define QCA8K_REG_PWS 0x010 #define QCA8K_PWS_SERDES_AEN_DIS BIT(7)
The original code had the internal dalay set to 1 for tx and 2 for rx. Apply the oem internal dalay to fix some switch communication error. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- drivers/net/dsa/qca8k.c | 6 ++++-- drivers/net/dsa/qca8k.h | 9 ++++----- 2 files changed, 8 insertions(+), 7 deletions(-)