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[v2] ASoC: fsl_esai: Fix ESAI_xCCR_xDC_WIDTH definition

Message ID 302670613.333771.1418920671738.JavaMail.yahoo@jws11119.mail.ir2.yahoo.com
State New
Headers show

Commit Message

'Timothy Arceri' via Patchwork Forward Dec. 18, 2014, 4:37 p.m. UTC 
From 9bcae891b8fe7a42cbc2cd88319f7bd4ab44d012 Mon Sep 17 00:00:00 2001
From: Aurelien BOUIN <a_bouin@yahoo.fr>
Date: Thu, 18 Dec 2014 15:14:53 +0100
Subject: [PATCH 1/1] According to the mx6 reference manual the TDC and RDC
field of registers ESAI_TCCR and ESAI_RCCR have a width of 5 bits, not 4

Signed-off-by: Aurelien BOUIN <a_bouin@yahoo.fr>
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Patch

diff --git a/sound/soc/fsl/fsl_esai.h b/sound/soc/fsl/fsl_esai.h
index 91a550f..5e793bb 100644
--- a/sound/soc/fsl/fsl_esai.h
+++ b/sound/soc/fsl/fsl_esai.h
@@ -302,7 +302,7 @@ 
#define ESAI_xCCR_xFP_MASK    (((1 << ESAI_xCCR_xFP_WIDTH) - 1) << ESAI_xCCR_xFP_SHIFT)
#define ESAI_xCCR_xFP(v)    ((((v) - 1) << ESAI_xCCR_xFP_SHIFT) & ESAI_xCCR_xFP_MASK)
#define ESAI_xCCR_xDC_SHIFT     9
-#define ESAI_xCCR_xDC_WIDTH    4
+#define ESAI_xCCR_xDC_WIDTH    5
#define ESAI_xCCR_xDC_MASK    (((1 << ESAI_xCCR_xDC_WIDTH) - 1) << ESAI_xCCR_xDC_SHIFT)
#define ESAI_xCCR_xDC(v)    ((((v) - 1) << ESAI_xCCR_xDC_SHIFT) & ESAI_xCCR_xDC_MASK)
#define ESAI_xCCR_xPSR_SHIFT    8