| Message ID | 1618574638-5117-5-git-send-email-sibis@codeaurora.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Use qmp_send to update co-processor load state | expand |
Quoting Sibi Sankar (2021-04-16 05:03:50) > Add Qualcomm Mailbox Protocol (QMP) binding to replace the power domains > exposed by the AOSS QMP node. > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
On Fri, 16 Apr 2021 17:33:50 +0530, Sibi Sankar wrote: > Add Qualcomm Mailbox Protocol (QMP) binding to replace the power domains > exposed by the AOSS QMP node. > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org> > --- > Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 69c49c7b2cff..494257010629 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -174,7 +174,12 @@ For the compatible string below the following supplies are required: must be "cx", "mx" qcom,sc7180-mss-pil: qcom,sdm845-mss-pil: - must be "cx", "mx", "mss", "load_state" + must be "cx", "mx", "mss" + +- qcom,qmp: + Usage: optional + Value type: <phandle> + Definition: reference to the AOSS side-channel message RAM. - qcom,smem-states: Usage: required
Add Qualcomm Mailbox Protocol (QMP) binding to replace the power domains exposed by the AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)