diff mbox series

[1/2] PCI: add AMD PCIe quirk for nvme shutdown opt

Message ID 1618381200-14856-1-git-send-email-Prike.Liang@amd.com
State Superseded
Headers show
Series [1/2] PCI: add AMD PCIe quirk for nvme shutdown opt | expand

Commit Message

Prike Liang April 14, 2021, 6:19 a.m. UTC 
The NVME device pluged in some AMD PCIE root port will resume timeout
from s2idle which caused by NVME power CFG lost in the SMU FW restore.
This issue can be workaround by using PCIe power set with simple
suspend/resume process path instead of APST. In the onwards ASIC will
try do the NVME shutdown save and restore in the BIOS and still need PCIe
power setting to resume from RTD3 for s2idle.

In this preparation patch add a PCIe quirk for the AMD.

Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
[ck: split patches for nvme and pcie]
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>

Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
Cc: <stable@vger.kernel.org> # 5.11+
---
 drivers/pci/quirks.c | 10 ++++++++++
 include/linux/pci.h  |  2 ++
 2 files changed, 12 insertions(+)

Comments

Greg KH April 14, 2021, 6:39 a.m. UTC | #1 
On Wed, Apr 14, 2021 at 02:20:00PM +0800, Prike Liang wrote:
> The NVME device pluged in some AMD PCIE root port will resume timeout
> from s2idle which caused by NVME power CFG lost in the SMU FW restore.
> This issue can be workaround by using PCIe power set with simple
> suspend/resume process path instead of APST. In the onwards ASIC will
> try do the NVME shutdown save and restore in the BIOS and still need
> PCIe power setting to resume from RTD3 for s2idle.
> 
> Update the nvme_acpi_storage_d3() _with previously added quirk.
> 
> Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
> [ck: split patches for nvme and pcie]
> Signed-off-by: Prike Liang <Prike.Liang@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
> Cc: <stable@vger.kernel.org> # 5.11+
> ---
>  drivers/nvme/host/pci.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
> index 6bad4d4..5a9a192 100644
> --- a/drivers/nvme/host/pci.c
> +++ b/drivers/nvme/host/pci.c
> @@ -2832,6 +2832,7 @@ static bool nvme_acpi_storage_d3(struct pci_dev *dev)
>  {
>  	struct acpi_device *adev;
>  	struct pci_dev *root;
> +	struct pci_dev *rdev;
>  	acpi_handle handle;
>  	acpi_status status;
>  	u8 val;
> @@ -2845,6 +2846,10 @@ static bool nvme_acpi_storage_d3(struct pci_dev *dev)
>  	if (!root)
>  		return false;
>  
> +	rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
> +	if (rdev && (rdev->dev_flags & PCI_DEV_FLAGS_AMD_NVME_SIMPLE_SUSPEND))
> +		return NVME_QUIRK_SIMPLE_SUSPEND;
> +
>  	adev = ACPI_COMPANION(&root->dev);
>  	if (!adev)
>  		return false;
> -- 
> 2.7.4
> 

This is still broken, why resend it?
Prike Liang April 14, 2021, 8:16 a.m. UTC | #2 
[AMD Public Use]

> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: Wednesday, April 14, 2021 3:49 PM
> To: Liang, Prike <Prike.Liang@amd.com>
> Cc: linux-nvme@lists.infradead.org; kbusch@kernel.org;
> Chaitanya.Kulkarni@wdc.com; hch@infradead.org; S-k, Shyam-sundar
> <Shyam-sundar.S-k@amd.com>; Deucher, Alexander
> <Alexander.Deucher@amd.com>; # 5 . 11+ <stable@vger.kernel.org>
> Subject: Re: [PATCH 2/2] nvme-pci: add AMD PCIe quirk for suspend/resume
>
> On Wed, Apr 14, 2021 at 07:13:15AM +0000, Liang, Prike wrote:
> > [AMD Public Use]
> >
> > > From: Greg KH <gregkh@linuxfoundation.org>
> > > Sent: Wednesday, April 14, 2021 2:40 PM
> > > To: Liang, Prike <Prike.Liang@amd.com>
> > > Cc: linux-nvme@lists.infradead.org; kbusch@kernel.org;
> > > Chaitanya.Kulkarni@wdc.com; hch@infradead.org; S-k, Shyam-sundar
> > > <Shyam-sundar.S-k@amd.com>; Deucher, Alexander
> > > <Alexander.Deucher@amd.com>; # 5 . 11+ <stable@vger.kernel.org>
> > > Subject: Re: [PATCH 2/2] nvme-pci: add AMD PCIe quirk for
> > > suspend/resume
> > >
> > > On Wed, Apr 14, 2021 at 02:20:00PM +0800, Prike Liang wrote:
> > > > The NVME device pluged in some AMD PCIE root port will resume
> > > > timeout from s2idle which caused by NVME power CFG lost in the SMU
> FW restore.
> > > > This issue can be workaround by using PCIe power set with simple
> > > > suspend/resume process path instead of APST. In the onwards ASIC
> > > > will try do the NVME shutdown save and restore in the BIOS and
> > > > still need PCIe power setting to resume from RTD3 for s2idle.
> > > >
> > > > Update the nvme_acpi_storage_d3() _with previously added quirk.
> > > >
> > > > Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
> > > > [ck: split patches for nvme and pcie]
> > > > Signed-off-by: Prike Liang <Prike.Liang@amd.com>
> > > > Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> > > > Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
> > > > Cc: <stable@vger.kernel.org> # 5.11+
> > > > ---
> > > >  drivers/nvme/host/pci.c | 5 +++++
> > > >  1 file changed, 5 insertions(+)
> > > >
> > > > diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
> > > > index
> > > > 6bad4d4..5a9a192 100644
> > > > --- a/drivers/nvme/host/pci.c
> > > > +++ b/drivers/nvme/host/pci.c
> > > > @@ -2832,6 +2832,7 @@ static bool nvme_acpi_storage_d3(struct
> > > > pci_dev
> > > > *dev)  {
> > > >  struct acpi_device *adev;
> > > >  struct pci_dev *root;
> > > > +struct pci_dev *rdev;
> > > >  acpi_handle handle;
> > > >  acpi_status status;
> > > >  u8 val;
> > > > @@ -2845,6 +2846,10 @@ static bool nvme_acpi_storage_d3(struct
> > > pci_dev *dev)
> > > >  if (!root)
> > > >  return false;
> > > >
> > > > +rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0)); if
> > > > +(rdev && (rdev->dev_flags &
> > > PCI_DEV_FLAGS_AMD_NVME_SIMPLE_SUSPEND))
> > > > +return NVME_QUIRK_SIMPLE_SUSPEND;
> > > > +
> > > >  adev = ACPI_COMPANION(&root->dev);  if (!adev)  return false;
> > > > --
> > > > 2.7.4
> > > >
> > >
> > > This is still broken, why resend it?
> > Sorry can't get how come the reference count leaked, could you help give
> more detail about this.
>
> Please read the documentation for the call you are making here.  For once, it
> is actually written down what needs to be done :)
Thanks, get it now and will update the patch.
diff mbox series

Patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 653660e3..f95c8b2 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -312,6 +312,16 @@  static void quirk_nopciamd(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,	PCI_DEVICE_ID_AMD_8151_0,	quirk_nopciamd);
 
+static void quirk_amd_nvme_fixup(struct pci_dev *dev)
+{
+	struct pci_dev *rdev;
+
+	dev->dev_flags |= PCI_DEV_FLAGS_AMD_NVME_SIMPLE_SUSPEND;
+	pci_info(dev, "AMD simple suspend opt enabled\n");
+
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1630, quirk_amd_nvme_fixup);
+
 /* Triton requires workarounds to be used by the drivers */
 static void quirk_triton(struct pci_dev *dev)
 {
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 53f4904..a6e1b1b 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -227,6 +227,8 @@  enum pci_dev_flags {
 	PCI_DEV_FLAGS_NO_FLR_RESET = (__force pci_dev_flags_t) (1 << 10),
 	/* Don't use Relaxed Ordering for TLPs directed at this device */
 	PCI_DEV_FLAGS_NO_RELAXED_ORDERING = (__force pci_dev_flags_t) (1 << 11),
+	/* AMD simple suspend opt quirk */
+	PCI_DEV_FLAGS_AMD_NVME_SIMPLE_SUSPEND = (__force pci_dev_flags_t) (1 << 12),
 };
 
 enum pci_irq_reroute_variant {