@@ -593,16 +593,20 @@ static void isc_start_dma(struct isc_device *isc)
ISC_PFE_CFG0_COLEN | ISC_PFE_CFG0_ROWEN);
addr0 = vb2_dma_contig_plane_dma_addr(&isc->cur_frm->vb.vb2_buf, 0);
- regmap_write(regmap, ISC_DAD0, addr0);
+ regmap_write(regmap, ISC_DAD0 + isc->offsets.dma, addr0);
switch (isc->config.fourcc) {
case V4L2_PIX_FMT_YUV420:
- regmap_write(regmap, ISC_DAD1, addr0 + (sizeimage * 2) / 3);
- regmap_write(regmap, ISC_DAD2, addr0 + (sizeimage * 5) / 6);
+ regmap_write(regmap, ISC_DAD1 + isc->offsets.dma,
+ addr0 + (sizeimage * 2) / 3);
+ regmap_write(regmap, ISC_DAD2 + isc->offsets.dma,
+ addr0 + (sizeimage * 5) / 6);
break;
case V4L2_PIX_FMT_YUV422P:
- regmap_write(regmap, ISC_DAD1, addr0 + sizeimage / 2);
- regmap_write(regmap, ISC_DAD2, addr0 + (sizeimage * 3) / 4);
+ regmap_write(regmap, ISC_DAD1 + isc->offsets.dma,
+ addr0 + sizeimage / 2);
+ regmap_write(regmap, ISC_DAD2 + isc->offsets.dma,
+ addr0 + (sizeimage * 3) / 4);
break;
default:
break;
@@ -610,7 +614,8 @@ static void isc_start_dma(struct isc_device *isc)
dctrl_dview = isc->config.dctrl_dview;
- regmap_write(regmap, ISC_DCTRL, dctrl_dview | ISC_DCTRL_IE_IS);
+ regmap_write(regmap, ISC_DCTRL + isc->offsets.dma,
+ dctrl_dview | ISC_DCTRL_IE_IS);
spin_lock(&isc->awb_lock);
regmap_write(regmap, ISC_CTRLEN, ISC_CTRL_CAPTURE);
spin_unlock(&isc->awb_lock);
@@ -723,7 +728,7 @@ static int isc_configure(struct isc_device *isc)
regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp,
ISC_RLP_CFG_MODE_MASK, rlp_mode);
- regmap_write(regmap, ISC_DCFG, dcfg);
+ regmap_write(regmap, ISC_DCFG + isc->offsets.dma, dcfg);
/* Set the pipeline */
isc_set_pipeline(isc, pipeline);
@@ -247,6 +247,9 @@
#define ISC_HIS_CFG_RAR BIT(8)
+/* Offset for DMA register specific to sama5d2 product */
+#define ISC_SAMA5D2_DMA_OFFSET 0
+
/* DMA Configuration Register */
#define ISC_DCFG 0x000003e0
#define ISC_DCFG_IMODE_PACKED8 0x0
@@ -152,6 +152,7 @@ struct isc_ctrls {
* @sub420: Offset for the SUB420 register
* @rlp: Offset for the RLP register
* @his: Offset for the HIS related registers
+ * @dma: Offset for the DMA related registers
*/
struct isc_reg_offsets {
u32 csc;
@@ -160,6 +161,7 @@ struct isc_reg_offsets {
u32 sub420;
u32 rlp;
u32 his;
+ u32 dma;
};
/*
@@ -239,6 +239,7 @@ static int atmel_isc_probe(struct platform_device *pdev)
isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET;
+ isc->offsets.dma = ISC_SAMA5D2_DMA_OFFSET;
/* sama5d2-isc - 8 bits per beat */
isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
Add dma to the reg offsets struct. This will allow different products to have a different reg offset for this particular module. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> --- drivers/media/platform/atmel/atmel-isc-base.c | 19 ++++++++++++------- drivers/media/platform/atmel/atmel-isc-regs.h | 3 +++ drivers/media/platform/atmel/atmel-isc.h | 2 ++ .../media/platform/atmel/atmel-sama5d2-isc.c | 1 + 4 files changed, 18 insertions(+), 7 deletions(-)