| Message ID | 1615879102-45919-2-git-send-email-shawn.lin@rock-chips.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v6,1/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Convert to yaml file | expand |
On Tue, 16 Mar 2021 at 08:18, Shawn Lin <shawn.lin@rock-chips.com> wrote: > > This patch adds rockchip support in sdhci-of-dwcmhsc.yaml > > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Applied for next, thanks! Kind regards Uffe > --- > > Changes in v6: None > Changes in v5: None > Changes in v4: > - rename compatible to rockchip,rk3568-dwcmshc > - constrains rockchip,txclk-tapnum to u8 to match the register map > > .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > index f99fb9f..e6c9a2f 100644 > --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml > @@ -16,6 +16,7 @@ allOf: > properties: > compatible: > enum: > + - rockchip,rk3568-dwcmshc > - snps,dwcmshc-sdhci > > reg: > @@ -31,12 +32,24 @@ properties: > items: > - description: core clock > - description: bus clock for optional > + - description: axi clock for rockchip specified > + - description: block clock for rockchip specified > + - description: timer clock for rockchip specified > + > > clock-names: > minItems: 1 > items: > - const: core > - const: bus > + - const: axi > + - const: block > + - const: timer > + > + rockchip,txclk-tapnum: > + description: Specify the number of delay for tx sampling. > + $ref: /schemas/types.yaml#/definitions/uint8 > + > > required: > - compatible > @@ -49,6 +62,17 @@ unevaluatedProperties: false > > examples: > - | > + mmc@fe310000 { > + compatible = "rockchip,rk3568-dwcmshc"; > + reg = <0xfe310000 0x10000>; > + interrupts = <0 25 0x4>; > + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; > + clock-names = "core", "bus", "axi", "block", "timer"; > + bus-width = <8>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + - | > mmc@aa0000 { > compatible = "snps,dwcmshc-sdhci"; > reg = <0xaa000 0x1000>; > -- > 2.7.4 > > >
diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index f99fb9f..e6c9a2f 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -16,6 +16,7 @@ allOf: properties: compatible: enum: + - rockchip,rk3568-dwcmshc - snps,dwcmshc-sdhci reg: @@ -31,12 +32,24 @@ properties: items: - description: core clock - description: bus clock for optional + - description: axi clock for rockchip specified + - description: block clock for rockchip specified + - description: timer clock for rockchip specified + clock-names: minItems: 1 items: - const: core - const: bus + - const: axi + - const: block + - const: timer + + rockchip,txclk-tapnum: + description: Specify the number of delay for tx sampling. + $ref: /schemas/types.yaml#/definitions/uint8 + required: - compatible @@ -49,6 +62,17 @@ unevaluatedProperties: false examples: - | + mmc@fe310000 { + compatible = "rockchip,rk3568-dwcmshc"; + reg = <0xfe310000 0x10000>; + interrupts = <0 25 0x4>; + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; + clock-names = "core", "bus", "axi", "block", "timer"; + bus-width = <8>; + #address-cells = <1>; + #size-cells = <0>; + }; + - | mmc@aa0000 { compatible = "snps,dwcmshc-sdhci"; reg = <0xaa000 0x1000>;
This patch adds rockchip support in sdhci-of-dwcmhsc.yaml Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> --- Changes in v6: None Changes in v5: None Changes in v4: - rename compatible to rockchip,rk3568-dwcmshc - constrains rockchip,txclk-tapnum to u8 to match the register map .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+)