@@ -710,13 +710,15 @@ WriteSections64 (
break;
case R_AARCH64_CALL26:
- if (Rel->r_addend != 0 ) { /* TODO */
- Error (NULL, 0, 3000, "Invalid", "AArch64: R_AARCH64_CALL26 Need to fixup with addend!.");
- }
- break;
-
case R_AARCH64_JUMP26:
- if (Rel->r_addend != 0 ) { /* TODO : AArch64 '-O2' optimisation. */
+ if (Rel->r_addend != 0 ) {
+ // Some references to static functions sometime start at the base of .text + addend.
+ // It is safe to ignore these relocations because they patch a `BL` instructions that
+ // contains an offset from the instruction itself and there is only a single .text section.
+ // So we check if the symbol is a "section symbol"
+ if (ELF64_ST_TYPE (Sym->st_info) == STT_SECTION) {
+ break;
+ }
Error (NULL, 0, 3000, "Invalid", "AArch64: R_AARCH64_JUMP26 Need to fixup with addend!.");
}
break;
When R_AARCH64_CALL26/R_AARCH64_JUMP26 relocations referred to static functions, they sometime refer to the start of the '.text' section + addend. It means the addend is different of '0'. The non-patched code (before applying the relocation) already contains the correct offset. SO, these relocations can be ignored in this condition. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> --- BaseTools/Source/C/GenFw/Elf64Convert.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-)