| Message ID | 46a360a9dff869606a417364a0a76c8ec4d0d4c9.1615423027.git.gurus@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for Qualcomm MFD PMIC register layout | expand |
diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c index cb13855..c70ef90 100644 --- a/drivers/base/regmap/regmap-irq.c +++ b/drivers/base/regmap/regmap-irq.c @@ -327,11 +327,11 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type) break; case IRQ_TYPE_LEVEL_HIGH: - d->type_buf[reg] |= t->type_level_high_val; + d->type_buf[reg] &= t->type_level_high_val; break; case IRQ_TYPE_LEVEL_LOW: - d->type_buf[reg] |= t->type_level_low_val; + d->type_buf[reg] &= t->type_level_low_val; break; default: return -EINVAL;
In order to configure LEVEL_HIGH and LEVEL_LOW for QCOM's type registers, the bit corresponding to the interrupt must be cleared. Therefore, in QCOM's case, the type_*_val are all to be configured as BIT() masks. Quite clearly, this is a fundamental change, and am looking for feedback on whether and how this may be handled in a generic manner. Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org> --- drivers/base/regmap/regmap-irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)