| Message ID | 20210303200253.1827553-3-atish.patra@wdc.com |
|---|---|
| State | Accepted |
| Commit | d53b0244c84c4e2721bede258e6a229ef56a138e |
| Headers | show |
| Series | Add Microchip PolarFire Soc Support | expand |
On Wed, 03 Mar 2021 12:02:50 -0800, Atish Patra wrote: > Add YAML DT binding documentation for the Microchip PolarFire SoC. > It is documented at: > > https://www.microsemi.com/products/fpga-soc/polarfire-soc-icicle-quick-start-guide > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > --- > .../devicetree/bindings/riscv/microchip.yaml | 27 +++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml new file mode 100644 index 000000000000..3f981e897126 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/microchip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PolarFire SoC-based boards device tree bindings + +maintainers: + - Cyril Jean <Cyril.Jean@microchip.com> + - Lewis Hanly <lewis.hanly@microchip.com> + +description: + Microchip PolarFire SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - microchip,mpfs-icicle-kit + - const: microchip,mpfs + +additionalProperties: true + +...
Add YAML DT binding documentation for the Microchip PolarFire SoC. It is documented at: https://www.microsemi.com/products/fpga-soc/polarfire-soc-icicle-quick-start-guide Signed-off-by: Atish Patra <atish.patra@wdc.com> --- .../devicetree/bindings/riscv/microchip.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml