@@ -2155,12 +2155,14 @@
nvidia,bpmp = <&bpmp>;
#address-cells = <1>;
#size-cells = <0>;
+ cluster-deepest-power-state = <0x6>;
cpu0_0: cpu@0 {
compatible = "nvidia,tegra194-carmel";
device_type = "cpu";
reg = <0x000>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2175,6 +2177,7 @@
device_type = "cpu";
reg = <0x001>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2189,6 +2192,7 @@
device_type = "cpu";
reg = <0x100>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2203,6 +2207,7 @@
device_type = "cpu";
reg = <0x101>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2217,6 +2222,7 @@
device_type = "cpu";
reg = <0x200>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2231,6 +2237,7 @@
device_type = "cpu";
reg = <0x201>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2245,6 +2252,7 @@
device_type = "cpu";
reg = <0x300>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2259,6 +2267,7 @@
device_type = "cpu";
reg = <0x301>;
enable-method = "psci";
+ cpu-idle-states = <&C6>;
i-cache-size = <131072>;
i-cache-line-size = <64>;
i-cache-sets = <512>;
@@ -2343,12 +2352,31 @@
cache-line-size = <64>;
cache-sets = <4096>;
};
+
+ cpu_core_power_states {
+ C6: c6 {
+ compatible = "nvidia,tegra194-cpuidle-core";
+ idle-state-name = "CPU powergated, state retained";
+ wakeup-latency-us = <2000>;
+ min-residency-us = <30000>;
+ arm,psci-suspend-param = <0x6>;
+ status = "okay";
+ };
+ };
+
+ cpu_crossover_thresholds {
+ thresholds {
+ crossover_c1_c6 = <30000>;
+ crossover_cc1_cc6 = <80000>;
+ };
+ };
};
psci {
compatible = "arm,psci-1.0";
status = "okay";
method = "smc";
+ cpu_suspend = <0xC4000001>;
};
sound {
This patch adds CPU core and cluster idle states to Tegra194 device tree Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)