Message ID | 20210225164216.21124-2-noltari@gmail.com |
---|---|
State | Superseded |
Headers | show |
Series | pinctrl: add BCM63XX pincontrol support | expand |
On Thu, Feb 25, 2021 at 5:42 PM Álvaro Fernández Rojas <noltari@gmail.com> wrote: > Add binding documentation for the pincontrol core found in BCM6328 SoCs. > > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> > Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> (...) > + interrupts-extended: > + description: > + One interrupt per each of the 4 GPIO ports supported by the controller, > + sorted by port number ascending order. > + minItems: 4 > + maxItems: 4 I don't know if this is advisable, there are different ways of specifying interrupts so this may become ambiguous, I think Rob will know how/if to do this though. Yours, Linus Walleij
On Tue, Mar 2, 2021 at 3:57 PM Linus Walleij <linus.walleij@linaro.org> wrote: > On Thu, Feb 25, 2021 at 5:42 PM Álvaro Fernández Rojas > <noltari@gmail.com> wrote: > > > Add binding documentation for the pincontrol core found in BCM6328 SoCs. > > > > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> > > Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> > (...) > > + interrupts-extended: > > + description: > > + One interrupt per each of the 4 GPIO ports supported by the controller, > > + sorted by port number ascending order. > > + minItems: 4 > > + maxItems: 4 > > I don't know if this is advisable, there are different ways > of specifying interrupts so this may become ambiguous, > I think Rob will know how/if to do this though. After reading the code I conclude this gpiochip is hierarchical so this should just be dropped, and we only need interrupt-parent assigned. The driver will know the hardware offsets between the interrupt parent and the GPIO block, this is generally the case for hierarchical interrupt controllers. Yours, Linus Walleij
Hi Linus, I think it's better if we leave the interrupts out for now. It's not critical and it can be added later. Best regards, Álvaro. El 02/03/2021 a las 16:23, Linus Walleij escribió: > On Tue, Mar 2, 2021 at 3:57 PM Linus Walleij <linus.walleij@linaro.org> wrote: >> On Thu, Feb 25, 2021 at 5:42 PM Álvaro Fernández Rojas >> <noltari@gmail.com> wrote: >> >>> Add binding documentation for the pincontrol core found in BCM6328 SoCs. >>> >>> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> >>> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> >> (...) >>> + interrupts-extended: >>> + description: >>> + One interrupt per each of the 4 GPIO ports supported by the controller, >>> + sorted by port number ascending order. >>> + minItems: 4 >>> + maxItems: 4 >> >> I don't know if this is advisable, there are different ways >> of specifying interrupts so this may become ambiguous, >> I think Rob will know how/if to do this though. > > After reading the code I conclude this gpiochip is hierarchical so this should > just be dropped, and we only need interrupt-parent assigned. The > driver will know the hardware offsets between the interrupt parent > and the GPIO block, this is generally the case for > hierarchical interrupt controllers. > > Yours, > Linus Walleij >
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml new file mode 100644 index 000000000000..2012cb1dbf5c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml @@ -0,0 +1,161 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6328-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6328 pin controller + +maintainers: + - Álvaro Fernández Rojas <noltari@gmail.com> + - Jonas Gorski <jonas.gorski@gmail.com> + +description: |+ + The pin controller node should be the child of a syscon node. + + Refer to the bindings described in + Documentation/devicetree/bindings/mfd/syscon.yaml + +properties: + compatible: + const: brcm,bcm6328-pinctrl + + gpio-controller: true + + '#gpio-cells': + description: + Specifies the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + interrupts-extended: + description: + One interrupt per each of the 4 GPIO ports supported by the controller, + sorted by port number ascending order. + minItems: 4 + maxItems: 4 + +patternProperties: + '^.*$': + if: + type: object + then: + properties: + function: + $ref: "/schemas/types.yaml#/definitions/string" + enum: [ serial_led_data, serial_led_clk, inet_act_led, pcie_clkreq, + led, ephy0_act_led, ephy1_act_led, ephy2_act_led, + ephy3_act_led, hsspi_cs1, usb_device_port, usb_host_port ] + + pins: + $ref: "/schemas/types.yaml#/definitions/string" + enum: [ gpio6, gpio7, gpio11, gpio16, gpio17, gpio18, gpio19, + gpio20, gpio25, gpio26, gpio27, gpio28, hsspi_cs1, + usb_port1 ] + +required: + - compatible + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples: + - | + gpio@10000080 { + compatible = "syscon", "simple-mfd"; + reg = <0x10000080 0x80>; + + pinctrl: pinctrl { + compatible = "brcm,bcm6328-pinctrl"; + + gpio-controller; + #gpio-cells = <2>; + + interrupts-extended = <&ext_intc 3 0>, + <&ext_intc 2 0>, + <&ext_intc 1 0>, + <&ext_intc 0 0>; + interrupt-names = "gpio12", + "gpio15", + "gpio23", + "gpio24"; + + pinctrl_serial_led: serial_led { + pinctrl_serial_led_data: serial_led_data { + function = "serial_led_data"; + pins = "gpio6"; + }; + + pinctrl_serial_led_clk: serial_led_clk { + function = "serial_led_clk"; + pins = "gpio7"; + }; + }; + + pinctrl_inet_act_led: inet_act_led { + function = "inet_act_led"; + pins = "gpio11"; + }; + + pinctrl_pcie_clkreq: pcie_clkreq { + function = "pcie_clkreq"; + pins = "gpio16"; + }; + + pinctrl_ephy0_spd_led: ephy0_spd_led { + function = "led"; + pins = "gpio17"; + }; + + pinctrl_ephy1_spd_led: ephy1_spd_led { + function = "led"; + pins = "gpio18"; + }; + + pinctrl_ephy2_spd_led: ephy2_spd_led { + function = "led"; + pins = "gpio19"; + }; + + pinctrl_ephy3_spd_led: ephy3_spd_led { + function = "led"; + pins = "gpio20"; + }; + + pinctrl_ephy0_act_led: ephy0_act_led { + function = "ephy0_act_led"; + pins = "gpio25"; + }; + + pinctrl_ephy1_act_led: ephy1_act_led { + function = "ephy1_act_led"; + pins = "gpio26"; + }; + + pinctrl_ephy2_act_led: ephy2_act_led { + function = "ephy2_act_led"; + pins = "gpio27"; + }; + + pinctrl_ephy3_act_led: ephy3_act_led { + function = "ephy3_act_led"; + pins = "gpio28"; + }; + + pinctrl_hsspi_cs1: hsspi_cs1 { + function = "hsspi_cs1"; + pins = "hsspi_cs1"; + }; + + pinctrl_usb_port1_device: usb_port1_device { + function = "usb_device_port"; + pins = "usb_port1"; + }; + + pinctrl_usb_port1_host: usb_port1_host { + function = "usb_host_port"; + pins = "usb_port1"; + }; + }; + };