diff mbox

[4/4] ARM: DT: apq8064: Add SATA controller support.

Message ID 1411982134-8090-1-git-send-email-srinivas.kandagatla@linaro.org
State New
Headers show

Commit Message

Srinivas Kandagatla Sept. 29, 2014, 9:15 a.m. UTC
This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 40 +++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

Comments

Stephen Boyd Sept. 29, 2014, 10:20 p.m. UTC | #1
On 09/29/14 02:15, Srinivas Kandagatla wrote:
> @@ -396,6 +407,35 @@
>  			usb-phy		= <&usb4_phy>;
>  		};
>  
> +		sata_phy0:sata-phy@1b400000{

add some spaces here?

> +			compatible	= "qcom,apq8064-sata-phy";
> +			reg		= <0x1b400000 0x200>;
> +			reg-names	= "phy_mem";
> +			clocks		= <&gcc SATA_PHY_CFG_CLK>;
> +			clock-names = "cfg";
> +			#phy-cells = <0>;

These two lost the pretty tabs.

> +		};
> +
> +		sata0: sata@29000000 {
> +			compatible	= "generic-ahci";
> +			reg		= <0x29000000 0x180>;
> +			interrupts	= <0 209 0>;

Sorry I'm nitpicking but it annoys me. Either align it all or don't
align it.

> +			clocks = <&gcc SFAB_SATA_S_H_CLK>, <&gcc SATA_H_CLK>,
> +				 <&gcc SATA_A_CLK>, <&gcc SATA_RXOOB_CLK>,
> +				 <&gcc SATA_PMALIVE_CLK>;
> +
> +			clock-names = "slave_iface", "iface",
> +				      "bus", "rxoob",
> +				      "core_pmalive";
> +			assigned-clocks = <&gcc SATA_RXOOB_CLK>,
> +						<&gcc SATA_PMALIVE_CLK>;
> +			assigned-clock-rates = <100000000>, <100000000>;
> +
> +			phys  = <&sata_phy0>;
> +			phy-names = "sata-phy";
> +			target-supply = <&pm8921_s4>;
> +		};
> +
>  		/* Temporary fixed regulator */
>  		vsdcc_fixed: vsdcc-regulator {
>  			compatible = "regulator-fixed";
Srinivas Kandagatla Sept. 30, 2014, 8:18 a.m. UTC | #2
On 29/09/14 23:20, Stephen Boyd wrote:
> On 09/29/14 02:15, Srinivas Kandagatla wrote:
>> @@ -396,6 +407,35 @@
>>   			usb-phy		= <&usb4_phy>;
>>   		};
>>
>> +		sata_phy0:sata-phy@1b400000{
>
> add some spaces here?
Will fix this in next version.
>
>> +			compatible	= "qcom,apq8064-sata-phy";
>> +			reg		= <0x1b400000 0x200>;
>> +			reg-names	= "phy_mem";
>> +			clocks		= <&gcc SATA_PHY_CFG_CLK>;
>> +			clock-names = "cfg";
>> +			#phy-cells = <0>;
>
> These two lost the pretty tabs.
>
Will fix this in next version.
>> +		};
>> +
>> +		sata0: sata@29000000 {
>> +			compatible	= "generic-ahci";
>> +			reg		= <0x29000000 0x180>;
>> +			interrupts	= <0 209 0>;
>
> Sorry I'm nitpicking but it annoys me. Either align it all or don't
> align it.
I Will fix this in next version.

thanks,
srini
>
>> +			clocks = <&gcc SFAB_SATA_S_H_CLK>, <&gcc SATA_H_CLK>,
>> +				 <&gcc SATA_A_CLK>, <&gcc SATA_RXOOB_CLK>,
>> +				 <&gcc SATA_PMALIVE_CLK>;
>> +
>> +			clock-names = "slave_iface", "iface",
>> +				      "bus", "rxoob",
>> +				      "core_pmalive";
>> +			assigned-clocks = <&gcc SATA_RXOOB_CLK>,
>> +						<&gcc SATA_PMALIVE_CLK>;
>> +			assigned-clock-rates = <100000000>, <100000000>;
>> +
>> +			phys  = <&sata_phy0>;
>> +			phy-names = "sata-phy";
>> +			target-supply = <&pm8921_s4>;
>> +		};
>> +
>>   		/* Temporary fixed regulator */
>>   		vsdcc_fixed: vsdcc-regulator {
>>   			compatible = "regulator-fixed";
>
>
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 38d3efa..fa057b7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -274,6 +274,17 @@ 
 				regulator-always-on;
 			};
 
+			pm8921_s4: pm8921-s4 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS4>;
+
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				qcom,boot-load 		= <200000>;
+				qcom,switch-mode-frequency = <3200000>;
+				regulator-always-on;
+			};
+
 			pm8921_l3: pm8921-l3 {
 				compatible	= "qcom,rpm-pm8921-pldo";
 				reg		= <QCOM_RPM_PM8921_LDO3>;
@@ -396,6 +407,35 @@ 
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0:sata-phy@1b400000{
+			compatible	= "qcom,apq8064-sata-phy";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names = "cfg";
+			#phy-cells = <0>;
+		};
+
+		sata0: sata@29000000 {
+			compatible	= "generic-ahci";
+			reg		= <0x29000000 0x180>;
+			interrupts	= <0 209 0>;
+			clocks = <&gcc SFAB_SATA_S_H_CLK>, <&gcc SATA_H_CLK>,
+				 <&gcc SATA_A_CLK>, <&gcc SATA_RXOOB_CLK>,
+				 <&gcc SATA_PMALIVE_CLK>;
+
+			clock-names = "slave_iface", "iface",
+				      "bus", "rxoob",
+				      "core_pmalive";
+			assigned-clocks = <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates = <100000000>, <100000000>;
+
+			phys  = <&sata_phy0>;
+			phy-names = "sata-phy";
+			target-supply = <&pm8921_s4>;
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";