diff mbox series

[2/2] mmc: mediatek: enable crypto hardware engine

Message ID 20210129055730.29672-1-peng.zhou@mediatek.com
State New
Headers show
Series None | expand

Commit Message

Peng Zhou Jan. 29, 2021, 5:57 a.m. UTC 
Use SMC call enable hardware crypto engine due to it only be control
in EL3.

Change-Id: I5c6c8c534442e030bc5a4de23a317049924a8852
Signed-off-by: Peng Zhou <peng.zhou@mediatek.com>
---
 drivers/mmc/host/mtk-sd.c | 20 ++++++++++++++++++++
 drivers/mmc/host/mtk-sd.h | 11 +++++++++++
 2 files changed, 31 insertions(+)
 create mode 100755 drivers/mmc/host/mtk-sd.h
diff mbox series

Patch

diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index e870afd66ae8..0387427b65a4 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -4,6 +4,7 @@ 
  * Author: Chaotian.Jing <chaotian.jing@mediatek.com>
  */
 
+#include <linux/arm-smccc.h>
 #include <linux/module.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
@@ -33,6 +34,7 @@ 
 #include <linux/mmc/slot-gpio.h>
 
 #include "cqhci.h"
+#include "mtk-sd.h"
 
 #define MAX_BD_NUM          1024
 #define MSDC_NR_CLOCKS      3
@@ -2467,6 +2469,7 @@  static int msdc_drv_probe(struct platform_device *pdev)
 	struct mmc_host *mmc;
 	struct msdc_host *host;
 	struct resource *res;
+	struct arm_smccc_res smccc_res;
 	int ret;
 
 	if (!pdev->dev.of_node) {
@@ -2612,6 +2615,14 @@  static int msdc_drv_probe(struct platform_device *pdev)
 		/* 0 size, means 65536 so we don't have to -1 here */
 		mmc->max_seg_size = 64 * 1024;
 	}
+	/*
+	 * 1: MSDC_AES_CTL_INIT
+	 * 4: cap_id, no-meaning
+	 * 1: cfg_id, we choose the second cfg group
+	 */
+	if (mmc->caps2 & MMC_CAP2_CRYPTO)
+		arm_smccc_smc(MTK_SIP_MMC_CONTROL,
+			1, 4, 1, 0, 0, 0, 0, &smccc_res);
 
 	host->timeout_clks = 3 * 1048576;
 	host->dma.gpd = dma_alloc_coherent(&pdev->dev,
@@ -2770,6 +2781,15 @@  static int __maybe_unused msdc_runtime_resume(struct device *dev)
 
 	msdc_ungate_clock(host);
 	msdc_restore_reg(host);
+
+	/*
+	 * 1: MSDC_AES_CTL_INIT
+	 * 4: cap_id, no-meaning
+	 * 1: cfg_id, we choose the second cfg group
+	 */
+	if (mmc->caps2 & MMC_CAP2_CRYPTO)
+		arm_smccc_smc(MTK_SIP_MMC_CONTROL,
+			1, 4, 1, 0, 0, 0, 0, &smccc_res);
 	return 0;
 }
 
diff --git a/drivers/mmc/host/mtk-sd.h b/drivers/mmc/host/mtk-sd.h
new file mode 100755
index 000000000000..e9421ef7d880
--- /dev/null
+++ b/drivers/mmc/host/mtk-sd.h
@@ -0,0 +1,11 @@ 
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ */
+
+#include <linux/soc/mediatek/mtk_sip_svc.h>
+
+/*
+ * SiP commands
+ */
+#define MTK_SIP_MMC_CONTROL               MTK_SIP_SMC_CMD(0x273)