diff mbox series

[v5,7/7] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998

Message ID 20210121195250.492500-8-angelogioacchino.delregno@somainline.org
State Superseded
Headers show
Series None | expand

Commit Message

AngeloGioacchino Del Regno Jan. 21, 2021, 7:52 p.m. UTC
The OSM programming addition has been done under the
qcom,cpufreq-hw-8998 compatible name: specify the requirement
of two additional register spaces for this functionality.
This implementation, with the same compatible, has been
tested on MSM8998 and SDM630.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 .../bindings/cpufreq/cpufreq-qcom-hw.yaml     | 66 +++++++++++++++----
 1 file changed, 52 insertions(+), 14 deletions(-)

Comments

Rob Herring (Arm) Feb. 5, 2021, 9:51 p.m. UTC | #1
On Thu, Jan 21, 2021 at 08:52:50PM +0100, AngeloGioacchino Del Regno wrote:
> The OSM programming addition has been done under the
> qcom,cpufreq-hw-8998 compatible name: specify the requirement
> of two additional register spaces for this functionality.
> This implementation, with the same compatible, has been
> tested on MSM8998 and SDM630.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  .../bindings/cpufreq/cpufreq-qcom-hw.yaml     | 66 +++++++++++++++----
>  1 file changed, 52 insertions(+), 14 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> index bc81b6203e27..17fd6a6cefb0 100644
> --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> @@ -18,6 +18,10 @@ description: |
>  properties:
>    compatible:
>      oneOf:
> +      - description: Non-secure v1 of CPUFREQ HW
> +        items:
> +          - const: qcom,cpufreq-hw-8998
> +
>        - description: v1 of CPUFREQ HW
>          items:
>            - const: qcom,cpufreq-hw
> @@ -28,21 +32,9 @@ properties:
>                - qcom,sm8250-cpufreq-epss
>            - const: qcom,cpufreq-epss
>  
> -  reg:
> -    minItems: 2
> -    maxItems: 3
> -    items:
> -      - description: Frequency domain 0 register region
> -      - description: Frequency domain 1 register region
> -      - description: Frequency domain 2 register region
> +  reg: {}
>  
> -  reg-names:
> -    minItems: 2
> -    maxItems: 3
> -    items:
> -      - const: freq-domain0
> -      - const: freq-domain1
> -      - const: freq-domain2
> +  reg-names: {}
>  
>    clocks:
>      items:
> @@ -57,6 +49,52 @@ properties:
>    '#freq-domain-cells':
>      const: 1
>  
> +if:
> +  properties:
> +    compatible:
> +      contains:
> +        const: qcom,cpufreq-hw-8998
> +then:
> +  properties:
> +    reg:
> +      minItems: 2
> +      maxItems: 6
> +      items:
> +        - description: Frequency domain 0 register region
> +        - description: Operating State Manager domain 0 register region
> +        - description: Frequency domain 1 register region
> +        - description: Operating State Manager domain 1 register region
> +        - description: PLL ACD domain 0 register region (if ACD programming required)
> +        - description: PLL ACD domain 1 register region (if ACD programming required)
> +
> +    reg-names:
> +      minItems: 2
> +      maxItems: 6
> +      items:
> +        - const: "osm-domain0"
> +        - const: "freq-domain0"
> +        - const: "osm-domain1"
> +        - const: "freq-domain1"
> +        - const: "osm-acd0"
> +        - const: "osm-acd1"

Don't need quotes.

> +
> +else:
> +  properties:
> +    reg:
> +      minItems: 2
> +      maxItems: 3
> +      items:
> +        - description: Frequency domain 0 register region
> +        - description: Frequency domain 1 register region
> +        - description: Frequency domain 2 register region
> +    reg-names:
> +      minItems: 2
> +      maxItems: 3
> +      items:
> +        - const: "freq-domain0"
> +        - const: "freq-domain1"
> +        - const: "freq-domain2"
> +
>  required:
>    - compatible
>    - reg
> -- 
> 2.30.0
>
AngeloGioacchino Del Regno Feb. 5, 2021, 10:23 p.m. UTC | #2
Il 05/02/21 22:51, Rob Herring ha scritto:
> On Thu, Jan 21, 2021 at 08:52:50PM +0100, AngeloGioacchino Del Regno wrote:

>> The OSM programming addition has been done under the

>> qcom,cpufreq-hw-8998 compatible name: specify the requirement

>> of two additional register spaces for this functionality.

>> This implementation, with the same compatible, has been

>> tested on MSM8998 and SDM630.

>>

>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

>> ---

>>   .../bindings/cpufreq/cpufreq-qcom-hw.yaml     | 66 +++++++++++++++----

>>   1 file changed, 52 insertions(+), 14 deletions(-)

>>

>> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml

>> index bc81b6203e27..17fd6a6cefb0 100644

>> --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml

>> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml

>> @@ -18,6 +18,10 @@ description: |

>>   properties:

>>     compatible:

>>       oneOf:

>> +      - description: Non-secure v1 of CPUFREQ HW

>> +        items:

>> +          - const: qcom,cpufreq-hw-8998

>> +

>>         - description: v1 of CPUFREQ HW

>>           items:

>>             - const: qcom,cpufreq-hw

>> @@ -28,21 +32,9 @@ properties:

>>                 - qcom,sm8250-cpufreq-epss

>>             - const: qcom,cpufreq-epss

>>   

>> -  reg:

>> -    minItems: 2

>> -    maxItems: 3

>> -    items:

>> -      - description: Frequency domain 0 register region

>> -      - description: Frequency domain 1 register region

>> -      - description: Frequency domain 2 register region

>> +  reg: {}

>>   

>> -  reg-names:

>> -    minItems: 2

>> -    maxItems: 3

>> -    items:

>> -      - const: freq-domain0

>> -      - const: freq-domain1

>> -      - const: freq-domain2

>> +  reg-names: {}

>>   

>>     clocks:

>>       items:

>> @@ -57,6 +49,52 @@ properties:

>>     '#freq-domain-cells':

>>       const: 1

>>   

>> +if:

>> +  properties:

>> +    compatible:

>> +      contains:

>> +        const: qcom,cpufreq-hw-8998

>> +then:

>> +  properties:

>> +    reg:

>> +      minItems: 2

>> +      maxItems: 6

>> +      items:

>> +        - description: Frequency domain 0 register region

>> +        - description: Operating State Manager domain 0 register region

>> +        - description: Frequency domain 1 register region

>> +        - description: Operating State Manager domain 1 register region

>> +        - description: PLL ACD domain 0 register region (if ACD programming required)

>> +        - description: PLL ACD domain 1 register region (if ACD programming required)

>> +

>> +    reg-names:

>> +      minItems: 2

>> +      maxItems: 6

>> +      items:

>> +        - const: "osm-domain0"

>> +        - const: "freq-domain0"

>> +        - const: "osm-domain1"

>> +        - const: "freq-domain1"

>> +        - const: "osm-acd0"

>> +        - const: "osm-acd1"

> 

> Don't need quotes.

> 


Ack

>> +

>> +else:

>> +  properties:

>> +    reg:

>> +      minItems: 2

>> +      maxItems: 3

>> +      items:

>> +        - description: Frequency domain 0 register region

>> +        - description: Frequency domain 1 register region

>> +        - description: Frequency domain 2 register region

>> +    reg-names:

>> +      minItems: 2

>> +      maxItems: 3

>> +      items:

>> +        - const: "freq-domain0"

>> +        - const: "freq-domain1"

>> +        - const: "freq-domain2"

>> +

>>   required:

>>     - compatible

>>     - reg

>> -- 

>> 2.30.0

>>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index bc81b6203e27..17fd6a6cefb0 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -18,6 +18,10 @@  description: |
 properties:
   compatible:
     oneOf:
+      - description: Non-secure v1 of CPUFREQ HW
+        items:
+          - const: qcom,cpufreq-hw-8998
+
       - description: v1 of CPUFREQ HW
         items:
           - const: qcom,cpufreq-hw
@@ -28,21 +32,9 @@  properties:
               - qcom,sm8250-cpufreq-epss
           - const: qcom,cpufreq-epss
 
-  reg:
-    minItems: 2
-    maxItems: 3
-    items:
-      - description: Frequency domain 0 register region
-      - description: Frequency domain 1 register region
-      - description: Frequency domain 2 register region
+  reg: {}
 
-  reg-names:
-    minItems: 2
-    maxItems: 3
-    items:
-      - const: freq-domain0
-      - const: freq-domain1
-      - const: freq-domain2
+  reg-names: {}
 
   clocks:
     items:
@@ -57,6 +49,52 @@  properties:
   '#freq-domain-cells':
     const: 1
 
+if:
+  properties:
+    compatible:
+      contains:
+        const: qcom,cpufreq-hw-8998
+then:
+  properties:
+    reg:
+      minItems: 2
+      maxItems: 6
+      items:
+        - description: Frequency domain 0 register region
+        - description: Operating State Manager domain 0 register region
+        - description: Frequency domain 1 register region
+        - description: Operating State Manager domain 1 register region
+        - description: PLL ACD domain 0 register region (if ACD programming required)
+        - description: PLL ACD domain 1 register region (if ACD programming required)
+
+    reg-names:
+      minItems: 2
+      maxItems: 6
+      items:
+        - const: "osm-domain0"
+        - const: "freq-domain0"
+        - const: "osm-domain1"
+        - const: "freq-domain1"
+        - const: "osm-acd0"
+        - const: "osm-acd1"
+
+else:
+  properties:
+    reg:
+      minItems: 2
+      maxItems: 3
+      items:
+        - description: Frequency domain 0 register region
+        - description: Frequency domain 1 register region
+        - description: Frequency domain 2 register region
+    reg-names:
+      minItems: 2
+      maxItems: 3
+      items:
+        - const: "freq-domain0"
+        - const: "freq-domain1"
+        - const: "freq-domain2"
+
 required:
   - compatible
   - reg