| Message ID | 20210120222114.1609779-2-bjorn.andersson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl: qcom: TLMM driver for SC8180x | expand |
On Wed, Jan 20, 2021 at 11:21 PM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > Several properties are shared between all TLMM bindings. By providing a > common binding to define these properties each platform's binding can be > reduced to just listing which of these properties should be checked for > - or further specified. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Overall it looks good, just cutting some slack for reviewers (especially DT people) before applying. > +description: > + This defines the common properties used to describe all Qualcomm TLMM > + bindings and pinconf/pinmux states for these. I vaguely recall asking you in the past what the acronym TLMM actually means. This would be a good place to expand the acronym so people know what these four letters actually represent. (There, I finally gave you an official reason to go and poke Qualcomm hardware engineers about this. ;) Yours, Linus Walleij
On 21-01-21, 14:20, Linus Walleij wrote: > On Wed, Jan 20, 2021 at 11:21 PM Bjorn Andersson > <bjorn.andersson@linaro.org> wrote: > > > Several properties are shared between all TLMM bindings. By providing a > > common binding to define these properties each platform's binding can be > > reduced to just listing which of these properties should be checked for > > - or further specified. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> > Overall it looks good, just cutting some slack for reviewers (especially > DT people) before applying. Yeah it does clean stuff up. I have rebased on SM8350 series on top of this, will post soon. > > +description: > > + This defines the common properties used to describe all Qualcomm TLMM > > + bindings and pinconf/pinmux states for these. > > I vaguely recall asking you in the past what the acronym TLMM actually > means. This would be a good place to expand the acronym so people > know what these four letters actually represent. It is Top Level Mode Multiplexer (TLMM) it is actually used in the binding doc :) > > (There, I finally gave you an official reason to go and poke Qualcomm > hardware engineers about this. ;) > > Yours, > Linus Walleij
On Thu 21 Jan 07:20 CST 2021, Linus Walleij wrote: > On Wed, Jan 20, 2021 at 11:21 PM Bjorn Andersson > <bjorn.andersson@linaro.org> wrote: > > > Several properties are shared between all TLMM bindings. By providing a > > common binding to define these properties each platform's binding can be > > reduced to just listing which of these properties should be checked for > > - or further specified. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > Overall it looks good, just cutting some slack for reviewers (especially > DT people) before applying. > > > +description: > > + This defines the common properties used to describe all Qualcomm TLMM > > + bindings and pinconf/pinmux states for these. > > I vaguely recall asking you in the past what the acronym TLMM actually > means. This would be a good place to expand the acronym so people > know what these four letters actually represent. > As Vinod said, it's used in a few places and I agree that we should spell it out here. In particular I had to include "phandle" in the list of valid properties for for the dtbs_check to pass when there are references to state nodes, so I would like to hear from Rob about that. Will respin this after getting his input - hopefully with his Ack ;) > (There, I finally gave you an official reason to go and poke Qualcomm > hardware engineers about this. ;) > :) Regards, Bjorn
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml new file mode 100644 index 000000000000..ab44952418ad --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,tlmm-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. TLMM definitions + +maintainers: + - Bjorn Andersson <bjorn.andersson@linaro.org> + +description: + This defines the common properties used to describe all Qualcomm TLMM + bindings and pinconf/pinmux states for these. + +properties: + interrupts: + description: Specifies the TLMM summary IRQ + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: + Specifies the PIN numbers and Flags, as defined in defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: + Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + + wakeup-parent: + description: + Specifying the interrupt-controller used to wake up the system when the + TLMM block has been powered down. + maxItems: 1 + + gpio-reserved-ranges: + description: + Pins can be reserved for trusted applications and thereby unaccessible + from the OS. This property can be used to mark the pins which resources + should not be accessed by the OS. Please see the ../gpio/gpio.txt for more + information. + +required: + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: true + +$defs: + qcom-tlmm-state: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + bias-pull-up: true + bias-disable: true + input-enable: true + output-high: true + output-low: true + phandle: true + + additionalProperties: true +...
Several properties are shared between all TLMM bindings. By providing a common binding to define these properties each platform's binding can be reduced to just listing which of these properties should be checked for - or further specified. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- .../bindings/pinctrl/qcom,tlmm-common.yaml | 85 +++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml