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[v2,2/2] arm64: dts: fsl-ls1012a-frdm: add spi-uart device

Message ID 20210119155106.1833610-2-paweldembicki@gmail.com
State Accepted
Commit 42c2c068834eab53621a869bd85dac3a915e059c
Headers show
Series [v2,1/2] arm64: dts: fsl-ls1012a-rdb: add i2c devices | expand

Commit Message

Pawel Dembicki Jan. 19, 2021, 3:51 p.m. UTC 
This patch adds spi-uart controller  to LS1012A-FRDM board dts.
Device is equipped in SC16IS740 from NXP.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
Changes in v2:
- reordered property list
- change clock name to "clock-sc16is7xx"

 .../boot/dts/freescale/fsl-ls1012a-frdm.dts   | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
index 67702667ed8a..2517528f684f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -7,6 +7,7 @@ 
  */
 /dts-v1/;
 
+#include <dt-bindings/interrupt-controller/irq.h>
 #include "fsl-ls1012a.dtsi"
 
 / {
@@ -57,6 +58,26 @@  simple-audio-card,codec {
 	};
 };
 
+&dspi {
+	bus-num = <0>;
+	status = "okay";
+
+	serial@0 {
+		compatible = "nxp,sc16is740";
+		reg = <0>;
+		spi-max-frequency = <4000000>;
+		clocks = <&sc16is7xx_clk>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+
+		sc16is7xx_clk: clock-sc16is7xx {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+		};
+	};
+};
+
 &duart0 {
 	status = "okay";
 };