| Message ID | 20210114180415.404418-2-angelogioacchino.delregno@somainline.org |
|---|---|
| State | New |
| Headers | show |
| Series | QCOM QUP I2C - Add noise rejection, convert to YAML | expand |
On Thu, Jan 14, 2021 at 07:04:13PM +0100, AngeloGioacchino Del Regno wrote: > Convert the qcom,i2c-qup binding to YAML schema. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > --- > .../devicetree/bindings/i2c/qcom,i2c-qup.txt | 40 --------- > .../devicetree/bindings/i2c/qcom,i2c-qup.yaml | 87 +++++++++++++++++++ > 2 files changed, 87 insertions(+), 40 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt > create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml > > diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt > deleted file mode 100644 > index dc71754a56af..000000000000 > --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt > +++ /dev/null > @@ -1,40 +0,0 @@ > -Qualcomm Universal Peripheral (QUP) I2C controller > - > -Required properties: > - - compatible: Should be: > - * "qcom,i2c-qup-v1.1.1" for 8660, 8960 and 8064. > - * "qcom,i2c-qup-v2.1.1" for 8974 v1. > - * "qcom,i2c-qup-v2.2.1" for 8974 v2 and later. > - - reg: Should contain QUP register address and length. > - - interrupts: Should contain I2C interrupt. > - > - - clocks: A list of phandles + clock-specifiers, one for each entry in > - clock-names. > - - clock-names: Should contain: > - * "core" for the core clock > - * "iface" for the AHB clock > - > - - #address-cells: Should be <1> Address cells for i2c device address > - - #size-cells: Should be <0> as i2c addresses have no size component > - > -Optional properties: > - - clock-frequency: Should specify the desired i2c bus clock frequency in Hz, > - defaults to 100kHz if omitted. > - > -Child nodes should conform to i2c bus binding. > - > -Example: > - > - i2c@f9924000 { > - compatible = "qcom,i2c-qup-v2.2.1"; > - reg = <0xf9924000 0x1000>; > - interrupts = <0 96 0>; > - > - clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; > - clock-names = "core", "iface"; > - > - clock-frequency = <355000>; > - > - #address-cells = <1>; > - #size-cells = <0>; > - }; > diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml > new file mode 100644 > index 000000000000..c5c7db3ac2a6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml > @@ -0,0 +1,87 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > + > +$id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Universal Peripheral (QUP) I2C controller > + > +maintainers: > + - Andy Gross <agross@kernel.org> > + - Bjorn Andersson <bjorn.andersson@linaro.org> > + > +description: Binding for Qualcomm "QUP" I2C controllers > + > +allOf: > + - $ref: /schemas/i2c/i2c-controller.yaml# > + > +properties: > + compatible: > + enum: > + - qcom,i2c-qup-v1.1.1 > + - qcom,i2c-qup-v2.1.1 > + - qcom,i2c-qup-v2.2.1 > + > + reg: > + items: > + - description: QUP I2C register iospace Just 'maxItems: 1' is sufficient for a single entry. > + > + clocks: > + items: > + - description: Core QUP I2C clock > + - description: AHB clock > + > + clock-names: > + items: > + - const: core > + - const: iface > + > + clock-frequency: > + minimum: 100000 > + maximum: 1000000 > + default: 100000 > + > + dmas: > + items: > + - description: RX DMA Channel phandle > + - description: TX DMA Channel phandle > + > + dma-names: > + items: > + - const: rx > + - const: tx > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 Can drop these. Covered by i2c-controller.yaml > + > +required: > + - compatible > + - clocks > + - clock-names > + - reg > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-msm8998.h> > + #include <dt-bindings/gpio/gpio.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + i2c@c175000 { > + compatible = "qcom,i2c-qup-v2.2.1"; > + reg = <0x0c175000 0x600>; > + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, > + <&gcc GCC_BLSP1_AHB_CLK>; > + clock-names = "core", "iface"; > + clock-frequency = <400000>; > + dmas = <&blsp_dma 4>, <&blsp_dma 5>; > + dma-names = "rx", "tx"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > -- > 2.29.2 >
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt deleted file mode 100644 index dc71754a56af..000000000000 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt +++ /dev/null @@ -1,40 +0,0 @@ -Qualcomm Universal Peripheral (QUP) I2C controller - -Required properties: - - compatible: Should be: - * "qcom,i2c-qup-v1.1.1" for 8660, 8960 and 8064. - * "qcom,i2c-qup-v2.1.1" for 8974 v1. - * "qcom,i2c-qup-v2.2.1" for 8974 v2 and later. - - reg: Should contain QUP register address and length. - - interrupts: Should contain I2C interrupt. - - - clocks: A list of phandles + clock-specifiers, one for each entry in - clock-names. - - clock-names: Should contain: - * "core" for the core clock - * "iface" for the AHB clock - - - #address-cells: Should be <1> Address cells for i2c device address - - #size-cells: Should be <0> as i2c addresses have no size component - -Optional properties: - - clock-frequency: Should specify the desired i2c bus clock frequency in Hz, - defaults to 100kHz if omitted. - -Child nodes should conform to i2c bus binding. - -Example: - - i2c@f9924000 { - compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0xf9924000 0x1000>; - interrupts = <0 96 0>; - - clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - - clock-frequency = <355000>; - - #address-cells = <1>; - #size-cells = <0>; - }; diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml new file mode 100644 index 000000000000..c5c7db3ac2a6 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Universal Peripheral (QUP) I2C controller + +maintainers: + - Andy Gross <agross@kernel.org> + - Bjorn Andersson <bjorn.andersson@linaro.org> + +description: Binding for Qualcomm "QUP" I2C controllers + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - qcom,i2c-qup-v1.1.1 + - qcom,i2c-qup-v2.1.1 + - qcom,i2c-qup-v2.2.1 + + reg: + items: + - description: QUP I2C register iospace + + clocks: + items: + - description: Core QUP I2C clock + - description: AHB clock + + clock-names: + items: + - const: core + - const: iface + + clock-frequency: + minimum: 100000 + maximum: 1000000 + default: 100000 + + dmas: + items: + - description: RX DMA Channel phandle + - description: TX DMA Channel phandle + + dma-names: + items: + - const: rx + - const: tx + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - clocks + - clock-names + - reg + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8998.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + i2c@c175000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x0c175000 0x600>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + clock-frequency = <400000>; + dmas = <&blsp_dma 4>, <&blsp_dma 5>; + dma-names = "rx", "tx"; + #address-cells = <1>; + #size-cells = <0>; + };
Convert the qcom,i2c-qup binding to YAML schema. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> --- .../devicetree/bindings/i2c/qcom,i2c-qup.txt | 40 --------- .../devicetree/bindings/i2c/qcom,i2c-qup.yaml | 87 +++++++++++++++++++ 2 files changed, 87 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml