| Message ID | 20210113183339.446239-7-angelogioacchino.delregno@somainline.org |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for Adreno 508/509/512 | expand |
On Wed, Jan 13, 2021 at 07:33:38PM +0100, AngeloGioacchino Del Regno wrote: > From: Konrad Dybcio <konrad.dybcio@somainline.org> > > Port over the command from downstream to prevent undefined > behaviour. Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> > Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index 24ab51bb5a01..23fc851756de 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -791,6 +791,9 @@ static int a5xx_hw_init(struct msm_gpu *gpu) > adreno_is_a540(adreno_gpu)) > gpu_write(gpu, REG_A5XX_UCHE_DBG_ECO_CNTL_2, regbit); > > + /* Disable All flat shading optimization (ALLFLATOPTDIS) */ > + gpu_rmw(gpu, REG_A5XX_VPC_DBG_ECO_CNTL, 0, (1 << 10)); > + > /* Protect registers from the CP */ > gpu_write(gpu, REG_A5XX_CP_PROTECT_CNTL, 0x00000007); > > -- > 2.29.2 >
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 24ab51bb5a01..23fc851756de 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -791,6 +791,9 @@ static int a5xx_hw_init(struct msm_gpu *gpu) adreno_is_a540(adreno_gpu)) gpu_write(gpu, REG_A5XX_UCHE_DBG_ECO_CNTL_2, regbit); + /* Disable All flat shading optimization (ALLFLATOPTDIS) */ + gpu_rmw(gpu, REG_A5XX_VPC_DBG_ECO_CNTL, 0, (1 << 10)); + /* Protect registers from the CP */ gpu_write(gpu, REG_A5XX_CP_PROTECT_CNTL, 0x00000007);