| Message ID | 20210110113826.1257293-1-aford173@gmail.com |
|---|---|
| State | Accepted |
| Commit | e8d08d80f4508e0601ea2beb0848b5a60d6a2c31 |
| Headers | show |
| Series | arm64: dts: imx8mm-beacon: add more pinctrl states for usdhc1 | expand |
On Sun, Jan 10, 2021 at 05:38:26AM -0600, Adam Ford wrote: > The WiFi chip is capable of communication at SDR104 speeds. > Enable 100Mhz and 200MHz pinmux to support this. > > Signed-off-by: Adam Ford <aford173@gmail.com> > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
On Sun, Jan 10, 2021 at 05:38:26AM -0600, Adam Ford wrote: > The WiFi chip is capable of communication at SDR104 speeds. > Enable 100Mhz and 200MHz pinmux to support this. > > Signed-off-by: Adam Ford <aford173@gmail.com> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi index d897913537ca..988f8ab679ad 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi @@ -256,8 +256,10 @@ bluetooth { &usdhc1 { #address-cells = <1>; #size-cells = <0>; - pinctrl-names = "default"; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; bus-width = <4>; non-removable; cap-power-off-card;
The WiFi chip is capable of communication at SDR104 speeds. Enable 100Mhz and 200MHz pinmux to support this. Signed-off-by: Adam Ford <aford173@gmail.com>