| Message ID | 20210105122649.13581-10-manivannan.sadhasivam@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Devicetree update for SDX55 platform | expand |
On 05-01-21, 17:56, Manivannan Sadhasivam wrote: > Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform. Reviewed-by: Vinod Koul <vkoul@kernel.org> > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > arch/arm/boot/dts/qcom-sdx55.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi > index 622a63b0058f..1b9b990ad0a2 100644 > --- a/arch/arm/boot/dts/qcom-sdx55.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi > @@ -166,6 +166,18 @@ sdhc_1: sdhci@8804000 { > status = "disabled"; > }; > > + qpic_bam: dma@1b04000 { > + compatible = "qcom,bam-v1.7.0"; > + reg = <0x01b04000 0x1c000>; > + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&rpmhcc RPMH_QPIC_CLK>; > + clock-names = "bam_clk"; > + #dma-cells = <1>; > + qcom,ee = <0>; > + qcom,controlled-remotely; > + status = "disabled"; > + }; > + > tcsr_mutex_block: syscon@1f40000 { > compatible = "syscon"; > reg = <0x1f40000 0x20000>; > -- > 2.25.1 -- ~Vinod
Hi Mani, On 05-01-21, 21:20, Vinod Koul wrote: > On 05-01-21, 17:56, Manivannan Sadhasivam wrote: > > Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform. > > Reviewed-by: Vinod Koul <vkoul@kernel.org> > > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > arch/arm/boot/dts/qcom-sdx55.dtsi | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi > > index 622a63b0058f..1b9b990ad0a2 100644 > > --- a/arch/arm/boot/dts/qcom-sdx55.dtsi > > +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi > > @@ -166,6 +166,18 @@ sdhc_1: sdhci@8804000 { > > status = "disabled"; > > }; > > > > + qpic_bam: dma@1b04000 { This should be dma-controller@ Also, please run dtbs_check on these patches > > + compatible = "qcom,bam-v1.7.0"; > > + reg = <0x01b04000 0x1c000>; > > + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&rpmhcc RPMH_QPIC_CLK>; > > + clock-names = "bam_clk"; > > + #dma-cells = <1>; > > + qcom,ee = <0>; > > + qcom,controlled-remotely; > > + status = "disabled"; > > + }; > > + > > tcsr_mutex_block: syscon@1f40000 { > > compatible = "syscon"; > > reg = <0x1f40000 0x20000>; > > -- > > 2.25.1 > > -- > ~Vinod -- ~Vinod
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 622a63b0058f..1b9b990ad0a2 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -166,6 +166,18 @@ sdhc_1: sdhci@8804000 { status = "disabled"; }; + qpic_bam: dma@1b04000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x01b04000 0x1c000>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rpmhcc RPMH_QPIC_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + status = "disabled"; + }; + tcsr_mutex_block: syscon@1f40000 { compatible = "syscon"; reg = <0x1f40000 0x20000>;
Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm/boot/dts/qcom-sdx55.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.25.1