@@ -10910,7 +10910,8 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
gen_io_start();
}
- if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
+ if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT) &&
+ qemu_log_in_addr_range(dc->pc))) {
tcg_gen_debug_insn_start(dc->pc);
}
@@ -10984,7 +10985,8 @@ done_generating:
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
+ qemu_log_in_addr_range(pc_start)) {
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(env, pc_start, dc->pc - pc_start,
@@ -11018,7 +11018,8 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
- if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
+ if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT)) &&
+ qemu_log_in_addr_range(dc->pc)) {
tcg_gen_debug_insn_start(dc->pc);
}
@@ -11138,7 +11139,8 @@ done_generating:
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) &&
+ qemu_log_in_addr_range(pc_start)) {
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(env, pc_start, dc->pc - pc_start,
Each individual architecture needs to use the qemu_log_in_addr_range() feature for enabling in_asm and marking blocks for op/opt_op output. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>