Message ID | CAKSNEw6tDGHTJ2_D=uVm3an5Gf7OBfAhWsJFQTm7As-1VmRntQ@mail.gmail.com |
---|---|
State | New |
Headers | show |
On 16/08/11 10:28, Ira Rosen wrote: > Hi, > > This patch changes the default vector size for auto-vectorization on > ARM NEON to 128 bits. This new version is a result of a discussion > with Richard and Ramana. > > wwwdocs changes will follow shortly. > > Bootstrapped and tested on arm-linux-gnueabi. The testsuite changes > were also checked on powerpc64-suse-linux and x86_64-suse-linux. > > There is one new failure: > gcc.c-torture/execute/mode-dependent-address.c fails with -O3 > -funroll-loops with this patch or with -mvectorize-with-neon-quad. > Ramana has a patch to fix this > http://gcc.gnu.org/ml/gcc/2011-08/msg00284.html. I will wait with > committing my patch until this issue is resolved. > > OK for mainline? > > Thanks, > Ira > > ChangeLog: > > * config/arm/arm.c (arm_preferred_simd_mode): Check > TARGET_NEON_VECTORIZE_DOUBLE instead of > TARGET_NEON_VECTORIZE_QUAD. > (arm_expand_sync): Likewise. > * config/arm/arm.opt (mvectorize-with-neon-quad): Make inverse > mask of mvectorize-with-neon-double. Add RejectNegative. > (mvectorize-with-neon-double): New. > > testsuite/ChangeLog: > > * lib/target-supports.exp (check_effective_target_vect_multiple_sizes): > New procedure. > (add_options_for_quad_vectors): Replace with ... > (add_options_for_double_vectors): ... this. > * gfortran.dg/vect/pr19049.f90: Expect more printings on targets that > support multiple vector sizes since the vectorizer attempts to > vectorize with both vector sizes. > * gcc.dg/vect/no-vfa-vect-79.c, > gcc.dg/vect/no-vfa-vect-102a.c, gcc.dg/vect/vect-outer-1a.c, > gcc.dg/vect/vect-outer-1b.c, gcc.dg/vect/vect-outer-2b.c, > gcc.dg/vect/vect-outer-3a.c, gcc.dg/vect/no-vfa-vect-37.c, > gcc.dg/vect/vect-outer-3b.c, gcc.dg/vect/no-vfa-vect-101.c, > gcc.dg/vect/no-vfa-vect-102.c, gcc.dg/vect/vect-reduc-dot-s8b.c, > gcc.dg/vect/vect-outer-1.c, gcc.dg/vect/vect-104.c: Likewise. > * gcc.dg/vect/vect-42.c: Run with 64 bit vectors if applicable. > * gcc.dg/vect/vect-multitypes-6.c, gcc.dg/vect/vect-52.c, > gcc.dg/vect/vect-54.c, gcc.dg/vect/vect-46.c, gcc.dg/vect/vect-48.c, > gcc.dg/vect/vect-96.c, gcc.dg/vect/vect-multitypes-3.c, > gcc.dg/vect/vect-40.c: Likewise. > * gcc.dg/vect/vect-outer-5.c: Remove quad-vectors option as > redundant. > * gcc.dg/vect/vect-109.c, gcc.dg/vect/vect-peel-1.c, > gcc.dg/vect/vect-peel-2.c, gcc.dg/vect/slp-25.c, > gcc.dg/vect/vect-multitypes-1.c, gcc.dg/vect/slp-3.c, > gcc.dg/vect/no-vfa-pr29145.c, gcc.dg/vect/vect-multitypes-4.c: > Likewise. > * gcc.dg/vect/vect-peel-4.c: Make ia global. > Ok with the following change: > static unsigned int > arm_autovectorize_vector_sizes (void) > { > - return TARGET_NEON_VECTORIZE_QUAD ? 16 | 8 : 0; > + return TARGET_NEON_VECTORIZE_DOUBLE ? 0 : 16 | 8; > } Please put parentheses round the expression to make the precedence explicit. R.
On 17 August 2011 15:49, Richard Earnshaw <rearnsha@arm.com> wrote: > On 16/08/11 10:28, Ira Rosen wrote: >> Hi, >> >> This patch changes the default vector size for auto-vectorization on >> ARM NEON to 128 bits. This new version is a result of a discussion >> with Richard and Ramana. >> >> wwwdocs changes will follow shortly. >> >> Bootstrapped and tested on arm-linux-gnueabi. The testsuite changes >> were also checked on powerpc64-suse-linux and x86_64-suse-linux. >> >> There is one new failure: >> gcc.c-torture/execute/mode-dependent-address.c fails with -O3 >> -funroll-loops with this patch or with -mvectorize-with-neon-quad. >> Ramana has a patch to fix this >> http://gcc.gnu.org/ml/gcc/2011-08/msg00284.html. I will wait with >> committing my patch until this issue is resolved. >> >> OK for mainline? >> >> Thanks, >> Ira >> >> ChangeLog: >> >> * config/arm/arm.c (arm_preferred_simd_mode): Check >> TARGET_NEON_VECTORIZE_DOUBLE instead of >> TARGET_NEON_VECTORIZE_QUAD. >> (arm_expand_sync): Likewise. >> * config/arm/arm.opt (mvectorize-with-neon-quad): Make inverse >> mask of mvectorize-with-neon-double. Add RejectNegative. >> (mvectorize-with-neon-double): New. >> >> testsuite/ChangeLog: >> >> * lib/target-supports.exp (check_effective_target_vect_multiple_sizes): >> New procedure. >> (add_options_for_quad_vectors): Replace with ... >> (add_options_for_double_vectors): ... this. >> * gfortran.dg/vect/pr19049.f90: Expect more printings on targets that >> support multiple vector sizes since the vectorizer attempts to >> vectorize with both vector sizes. >> * gcc.dg/vect/no-vfa-vect-79.c, >> gcc.dg/vect/no-vfa-vect-102a.c, gcc.dg/vect/vect-outer-1a.c, >> gcc.dg/vect/vect-outer-1b.c, gcc.dg/vect/vect-outer-2b.c, >> gcc.dg/vect/vect-outer-3a.c, gcc.dg/vect/no-vfa-vect-37.c, >> gcc.dg/vect/vect-outer-3b.c, gcc.dg/vect/no-vfa-vect-101.c, >> gcc.dg/vect/no-vfa-vect-102.c, gcc.dg/vect/vect-reduc-dot-s8b.c, >> gcc.dg/vect/vect-outer-1.c, gcc.dg/vect/vect-104.c: Likewise. >> * gcc.dg/vect/vect-42.c: Run with 64 bit vectors if applicable. >> * gcc.dg/vect/vect-multitypes-6.c, gcc.dg/vect/vect-52.c, >> gcc.dg/vect/vect-54.c, gcc.dg/vect/vect-46.c, gcc.dg/vect/vect-48.c, >> gcc.dg/vect/vect-96.c, gcc.dg/vect/vect-multitypes-3.c, >> gcc.dg/vect/vect-40.c: Likewise. >> * gcc.dg/vect/vect-outer-5.c: Remove quad-vectors option as >> redundant. >> * gcc.dg/vect/vect-109.c, gcc.dg/vect/vect-peel-1.c, >> gcc.dg/vect/vect-peel-2.c, gcc.dg/vect/slp-25.c, >> gcc.dg/vect/vect-multitypes-1.c, gcc.dg/vect/slp-3.c, >> gcc.dg/vect/no-vfa-pr29145.c, gcc.dg/vect/vect-multitypes-4.c: >> Likewise. >> * gcc.dg/vect/vect-peel-4.c: Make ia global. >> > > Ok with the following change: > >> static unsigned int >> arm_autovectorize_vector_sizes (void) >> { >> - return TARGET_NEON_VECTORIZE_QUAD ? 16 | 8 : 0; >> + return TARGET_NEON_VECTORIZE_DOUBLE ? 0 : 16 | 8; >> } > > > Please put parentheses round the expression to make the precedence explicit. I added parentheses and committed the patch. Thanks, Ira > > R. > >
Index: arm.c =================================================================== --- arm.c (revision 177426) +++ arm.c (working copy) @@ -22767,15 +22767,15 @@ arm_preferred_simd_mode (enum machine_mode mode) switch (mode) { case SFmode: - return TARGET_NEON_VECTORIZE_QUAD ? V4SFmode : V2SFmode; + return TARGET_NEON_VECTORIZE_DOUBLE ? V2SFmode : V4SFmode; case SImode: - return TARGET_NEON_VECTORIZE_QUAD ? V4SImode : V2SImode; + return TARGET_NEON_VECTORIZE_DOUBLE ? V2SImode : V4SImode; case HImode: - return TARGET_NEON_VECTORIZE_QUAD ? V8HImode : V4HImode; + return TARGET_NEON_VECTORIZE_DOUBLE ? V4HImode : V8HImode; case QImode: - return TARGET_NEON_VECTORIZE_QUAD ? V16QImode : V8QImode; + return TARGET_NEON_VECTORIZE_DOUBLE ? V8QImode : V16QImode; case DImode: - if (TARGET_NEON_VECTORIZE_QUAD) + if (!TARGET_NEON_VECTORIZE_DOUBLE) return V2DImode; break; @@ -23998,7 +23998,7 @@ arm_expand_sync (enum machine_mode mode, static unsigned int arm_autovectorize_vector_sizes (void) { - return TARGET_NEON_VECTORIZE_QUAD ? 16 | 8 : 0; + return TARGET_NEON_VECTORIZE_DOUBLE ? 0 : 16 | 8; } static bool Index: arm.opt =================================================================== --- arm.opt (revision 177426) +++ arm.opt (working copy) @@ -238,9 +238,13 @@ Target Report RejectNegative Mask(LITTLE_WORDS) Assume big endian bytes, little endian words. This option is deprecated. mvectorize-with-neon-quad -Target Report Mask(NEON_VECTORIZE_QUAD) +Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE) Use Neon quad-word (rather than double-word) registers for vectorization +mvectorize-with-neon-double +Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE) +Use Neon double-word (rather than quad-word) registers for vectorization + mword-relocations Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)