| Message ID | 20201213183759.223246-9-aford173@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: renesas: Cleanup Beacon Kit and support more SoC's | expand |
Hi Adam, On Sun, Dec 13, 2020 at 7:38 PM Adam Ford <aford173@gmail.com> wrote: > The baseboard supports SCIF4, enable the pins and the node for it. > > Signed-off-by: Adam Ford <aford173@gmail.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi > +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi > @@ -578,6 +578,11 @@ pwm2_pins: pwm2 { > function = "pwm2"; > }; > > + scif4_pins: scif4 { > + groups = "scif4_data_c"; > + function = "scif4"; > + }; > + > sdhi0_pins: sd0 { > groups = "sdhi0_data4", "sdhi0_ctrl"; > function = "sdhi0"; > @@ -706,6 +711,12 @@ &scif0 { > status = "okay"; > }; > > +&scif4 { > + pinctrl-0 = <&scif4_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > &scif5 { > pinctrl-0 = <&scif5_pins>; > pinctrl-names = "default"; As mixing SCIF ports with and without aliases may lead to failures, depending on probe order, you want to add an aliases for scif4 to arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts. I see you did that for the rzg2h and rzg2n kits, but rzh2m lacks it. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index aab39aae5ccb..bf047a9836ed 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -578,6 +578,11 @@ pwm2_pins: pwm2 { function = "pwm2"; }; + scif4_pins: scif4 { + groups = "scif4_data_c"; + function = "scif4"; + }; + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -706,6 +711,12 @@ &scif0 { status = "okay"; }; +&scif4 { + pinctrl-0 = <&scif4_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &scif5 { pinctrl-0 = <&scif5_pins>; pinctrl-names = "default";
The baseboard supports SCIF4, enable the pins and the node for it. Signed-off-by: Adam Ford <aford173@gmail.com> --- .../boot/dts/renesas/beacon-renesom-baseboard.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)