| Message ID | 20201128142839.517949-9-paul.kocialkowski@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | Allwinner MIPI CSI-2 support for A31/V3s/A83T | expand |
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index c010b27fdb6a..3ce030f7e05d 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -1062,7 +1062,17 @@ csi: camera@1cb0000 { resets = <&ccu RST_BUS_CSI>; status = "disabled"; - csi_in: port { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi_in_parallel: port@0 { + reg = <0>; + }; + + csi_in_mipi_csi2_bridge: port@1 { + reg = <1>; + }; }; };
Since the CSI controller binding is getting a bit more complex due to the addition of MIPI CSI-2 bridge support, make the ports node explicit with the parallel and MIPI CSI-2 bridge ports. This way, it's clear that the controller supports both parallel and MIPI CSI-2 interface inputs and there's no confusion about their port number. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)