diff mbox series

[v2] arm64: dts: sdm845: Add iommus property to qup

Message ID 20201122034149.626045-1-bjorn.andersson@linaro.org
State Accepted
Commit 4785cff7cb9c8bcbff3891013d2f8eb973d676f3
Headers show
Series [v2] arm64: dts: sdm845: Add iommus property to qup | expand

Commit Message

Bjorn Andersson Nov. 22, 2020, 3:41 a.m. UTC 
From: Stephen Boyd <swboyd@chromium.org>


The SMMU that sits in front of the QUP needs to be programmed properly
so that the i2c geni driver can allocate DMA descriptors. Failure to do
this leads to faults when using devices such as an i2c touchscreen where
the transaction is larger than 32 bytes and we use a DMA buffer.

arm-smmu 15000000.iommu: Unexpected global fault, this could be serious
arm-smmu 15000000.iommu:         GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000006c0, GFSYNR2 0x00000000

Add the right SID and mask so this works.

Signed-off-by: Stephen Boyd <swboyd@chromium.org>

[bjorn: Define for second QUP as well, be more specific in sdm845.dtsi]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

---
 arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 2 ++
 arch/arm64/boot/dts/qcom/sdm845.dtsi       | 2 ++
 2 files changed, 4 insertions(+)

-- 
2.28.0

Comments

Vinod Koul Nov. 23, 2020, 5:14 p.m. UTC | #1 
On 21-11-20, 19:41, Bjorn Andersson wrote:
> From: Stephen Boyd <swboyd@chromium.org>

> 

> The SMMU that sits in front of the QUP needs to be programmed properly

> so that the i2c geni driver can allocate DMA descriptors. Failure to do

> this leads to faults when using devices such as an i2c touchscreen where

> the transaction is larger than 32 bytes and we use a DMA buffer.

> 

> arm-smmu 15000000.iommu: Unexpected global fault, this could be serious

> arm-smmu 15000000.iommu:         GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000006c0, GFSYNR2 0x00000000

> 

> Add the right SID and mask so this works.


Reviewed-by: Vinod Koul <vkoul@kernel.org>


on DB845c with GSI DMA:
Tested-by: Vinod Koul <vkoul@kernel.org>


-- 
~Vinod
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
index 39f23cdcbd02..216a74f0057c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
@@ -653,10 +653,12 @@  &pm8998_pwrkey {
 
 &qupv3_id_0 {
 	status = "okay";
+	iommus = <&apps_smmu 0x0 0x3>;
 };
 
 &qupv3_id_1 {
 	status = "okay";
+	iommus = <&apps_smmu 0x6c0 0x3>;
 };
 
 &sdhc_2 {
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 6465a6653ad9..d6b7b1bfa202 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1120,6 +1120,7 @@  qupv3_id_0: geniqup@8c0000 {
 			clock-names = "m-ahb", "s-ahb";
 			clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
 				 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+			iommus = <&apps_smmu 0x3 0x0>;
 			#address-cells = <2>;
 			#size-cells = <2>;
 			ranges;
@@ -1460,6 +1461,7 @@  qupv3_id_1: geniqup@ac0000 {
 			clock-names = "m-ahb", "s-ahb";
 			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
 				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+			iommus = <&apps_smmu 0x6c3 0x0>;
 			#address-cells = <2>;
 			#size-cells = <2>;
 			ranges;